IP Library › Granted Patent US 12,658,561
Granted Patent B2
US 12,658,561 · App. 17/741,677 · Granted Jun 16, 2026

Symmetric multi-IC modules using hierarchical digital reconfiguration of integrated circuit chips

Inventors: Bodhisatwa Sadhu (Peekskill, NY); Mark Yeck (Bloomingdale, NJ); Arun Paidimarri (White Plains, NY)
Assignee: International Business Machines Corporation
H01Q1/2283H01Q1/40H01Q13/10H10W44/20
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Quick Facts
Patent No.
US 12,658,561
App. No.
17/741,677
Granted
Jun 16, 2026
Kind
B2
Abstract

A circuit comprises a set of ports of a first type arranged symmetrically about an axis of symmetry of the circuit, and a digital reassigner configured to reassign an original port of the set of ports to a reassigned port of the set of ports located on an opposite side of the axis of symmetry.

Claims (42)

1 . A circuit, comprising:

a first set of ports of a first type arranged symmetrically about a first axis of symmetry;

a second set of ports of a second type arranged symmetrically about a second axis of symmetry; and

a digital reassigner configured to reassign an original port of the first set of ports to a reassigned port of the first set of ports located on an opposite side of the first axis of symmetry and to reassign an original port of the second set of ports to a reassigned port of the second set of ports located on an opposite side of the second axis of symmetry, wherein:

the first type of port is selected from the group consisting of an antenna-type port, a radio frequency port, an intermediate frequency port, a local oscillator port, and a digital data-type port; and

the second type of port is selected from the group consisting of an antenna-type port, a radio frequency port, an intermediate frequency port, a local oscillator port, and a digital data-type port, and wherein the second type of port differs from the first type of port.

2 . The circuit of claim 1 , wherein the first axis of symmetry and the second axis of symmetry are both one of a vertical, a horizontal axis of symmetry, and a diagonal axis of symmetry with respect to the circuit.

3 . The circuit of claim 1 , wherein the first axis of symmetry and the second axis of symmetry are the same axis.

4 . The circuit of claim 1 , wherein the circuit is an integrated circuit chip having a common chip substrate.

5 . A circuit module, comprising a plurality of the circuits of claim 1 .

6 . The circuit module of claim 5 , wherein:

a first modified proper subset of the plurality of the circuits are modified circuits that have digitally reassigned ports such that the modified circuits are mirrored personalities of an unmodified subset of the plurality of the circuits.

7 . The circuit module of claim 5 , wherein:

a second modified proper subset of the plurality of the circuits are rotated with respect to other circuits of the plurality of circuits.

8 . The circuit module of claim 7 , wherein:

a first modified proper subset of the plurality of the circuits are modified circuits that have digitally reassigned ports such that the modified circuits are mirrored personalities of an unmodified subset of the plurality of the circuits.

9 . The circuit module of claim 5 , wherein connections to the first set of circuit ports are symmetrical in a package in at least one axis of symmetry.

10 . The circuit module of claim 5 , wherein the circuit module is a package comprising a package substrate upon which the plurality of circuits is mounted.

11 . A method for producing a circuit, comprising:

providing a plurality of ports of a first type arranged about a first axis of symmetry of the circuit;

providing a second set of ports of a second type arranged symmetrically about a second axis of symmetry; and

providing a digital reassigner configured to reassign an original port of the set of ports to a reassigned port of the set of ports located on an opposite side of the first axis of symmetry and to reassign an original port of the second set of ports to a reassigned port of the second set of ports located on an opposite side of the second axis of symmetry, wherein:

the first type of port is selected from the group consisting of an antenna-type port, a radio frequency port, an intermediate frequency port, a local oscillator port, and a digital data-type port; and

the second type of port is selected from the group consisting of an antenna-type port, a radio frequency port, an intermediate frequency port, a local oscillator port, and a digital data-type port, and wherein the second type of port differs from the first type of port.

12 . The method of claim 11 , wherein the first circuit defines a default configuration, the method further comprising:

producing a second circuit that is the same as the first circuit, but having a mirrored configuration with respect to the first circuit; and

applying the first circuit and the second circuit on a common substrate.

13 . The method of claim 11 , wherein the first circuit defines a default configuration, the method further comprising:

producing a second circuit that is the same as the first circuit;

rotating the second circuit 180° to produce a rotated circuit; and

applying the first circuit and the rotated circuit on a common substrate.

14 . The method of claim 13 , wherein the second circuit has a mirrored configuration to the first circuit.

15 . The method of claim 11 , further comprising placing the circuit on a package substrate to produce a circuit package.

16 . The method of claim 15 , further comprising producing a plurality of circuit packages to place on a common assembly.

17 . A circuit module comprising:

a plurality of circuits, each circuit comprising:

a first set of ports of a first type arranged symmetrically about a first axis of symmetry; and

a digital reassigner configured to reassign an original port of the first set of ports to a reassigned port of the first set of ports located on an opposite side of the first axis of symmetry, wherein a second modified proper subset of the plurality of the circuits are rotated with respect to other circuits of the plurality of circuits.

18 . The circuit module of claim 17 , wherein:

a first modified proper subset of the plurality of the circuits are modified circuits that have digitally reassigned ports such that the modified circuits are mirrored personalities of an unmodified subset of the plurality of the circuits.

19 . The circuit module of claim 17 , wherein connections to the first set of circuit ports are symmetrical in a package in at least one axis of symmetry.

20 . The circuit module of claim 17 , wherein the circuit module is a package comprising a package substrate upon which the plurality of circuits is mounted.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2022
From: SADHU, BODHISATWA; YECK, MARK; PAIDIMARRI, ARUN
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 059890/0762 →
Continuity (1)
Related Publication 20230369743A1 · Nov 16, 2023
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