IP Library › Granted Patent US 12,660,623
Granted Patent B2
US 12,660,623 · App. 18/177,962 · Granted Jun 16, 2026

Semiconductor device and method of manufacturing semiconductor device

Inventor: Yuichi Sano (Tokyo, JP)
Assignee: KIOXIA CORPORATION
H10W40/258H10B80/00H10W70/02H10W74/127H10W90/00H10W74/00H10W80/701H10W90/732H10W90/736H10W90/752H10W90/754H10W90/794
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Quick Facts
Patent No.
US 12,660,623
App. No.
18/177,962
Granted
Jun 16, 2026
Kind
B2
Abstract

A semiconductor device includes a wiring board, a first semiconductor chip provided on the wiring board upwards, the first semiconductor chip including a first front surface having a connection terminal electrically connected to the wiring board and a second front surface opposite the first front surface, a chip stacked body provided on the wiring board upwards, the chip stacked body including a second semiconductor chip, a sealing insulator configured to cover the first semiconductor chip and the chip stacked body, the sealing insulator containing a resin, and a heat conductor provided between the sealing insulator and the second front surface and including a first region extending in a first direction which is an in-plane direction of the wiring board and a second region extending in a second direction from an end of the first region on a side of the first direction when a direction perpendicular to the in-plane direction of the wiring board and the first direction is defined as the second direction, the heat conductor having heat conductivity higher than heat conductivity of the resin.

Claims (31)

1 . A semiconductor device comprising:

a wiring board;

a first semiconductor chip disposed on the wiring board extending upwards, the first semiconductor chip including a first front surface and a second front surface, the first front surface having a connection terminal electrically connected to the wiring board, and the second front surface opposite the first front surface, the first front surface is a bottom surface of the first semiconductor chip and the second front surface is a top surface of the first semiconductor chip;

a chip stacked body disposed on the wiring board extending upwards, the chip stacked body including a second semiconductor chip;

a sealing insulator configured to cover the first semiconductor chip and the chip stacked body, the sealing insulator containing a resin; and

a heat conductor disposed between the sealing insulator and the second front surface, the heat conductor including a first region extending in a first direction and in contact with the first front surface, the first direction being in an in-plane direction of the wiring board, the heat conductor including a second region extending in a second direction from an end of the first region on a side of the first direction,

wherein a direction perpendicular to the in-plane direction of the wiring board and the first direction is defined as the second direction, the heat conductor having a heat conductivity higher than a heat conductivity of the resin.

2 . The semiconductor device according to claim 1 , wherein (i) a first end surface of the first region facing the side of the first direction, and (ii) a second end surface of the second region facing the side of the first direction, are exposed from the sealing insulator.

3 . The semiconductor device according to claim 1 , wherein the heat conductor further includes a third region provided at an end of the second region on a side of the second direction, and the third region is different from the second region.

4 . The semiconductor device according to claim 3 , wherein a third end surface of the third region facing the side of the second direction is exposed from the sealing insulator.

5 . The semiconductor device according to claim 1 , wherein the chip stacked body is disposed on the first semiconductor chip extending upwards, and

wherein the heat conductor is spaced apart from the chip stacked body.

6 . The semiconductor device according to claim 1 , wherein the heat conductor has (i) an oxide front surface in contact with the sealing insulator or (ii) an uneven front surface in contact with the sealing insulator.

7 . The semiconductor device according to claim 1 , further comprising a first heat insulating material disposed on a side surface of the first semiconductor chip, the first heat insulating material having a heat conductivity lower than the heat conductivity of the resin.

8 . The semiconductor device according to claim 5 , further comprising a second heat insulating material disposed between the heat conductor and the chip stacked body, the second heat insulating material having a heat conductivity lower than the heat conductivity of the resin.

9 . The semiconductor device according to claim 1 , wherein the wiring board includes a printed wiring board.

10 . The semiconductor device according to claim 1 , wherein the first semiconductor chip includes a memory controller chip.

11 . The semiconductor device according to claim 10 , wherein the second semiconductor chip includes a memory chip.

12 . The semiconductor device according to claim 1 , wherein the heat conductor includes a metal material.

13 . The semiconductor device according to claim 1 , wherein the first region includes a lower plate.

14 . The semiconductor device according to claim 13 , wherein the second region includes a side plate.

15 . The semiconductor device according to claim 14 wherein the lower plate overlaps the side plate.

16 . The semiconductor device according to claim 1 , further comprising an underfill resin disposed between the first semiconductor chip and the wiring board.

17 . A semiconductor device comprising:

a wiring board;

a first semiconductor chip disposed on the wiring board extending upwards, the first semiconductor chip including a first front surface and a second front surface, the first front surface having a connection terminal electrically connected to the wiring board, and the second front surface opposite the first front surface;

a chip stacked body disposed on the wiring board extending upwards, the chip stacked body including a second semiconductor chip;

a sealing insulator configured to cover the first semiconductor chip and the chip stacked body, the sealing insulator containing a resin; and

a heat conductor disposed between the sealing insulator and the second front surface, the heat conductor including a first region extending in a first direction, the first direction being in an in-plane direction of the wiring board, the heat conductor including a second region extending in a second direction from an end of the first region on a side of the first direction, the heat conductor including a third region provided at an end of the second region on a side of the second direction,

wherein a direction perpendicular to the in-plane direction of the wiring board and the first direction is defined as the second direction, the heat conductor having a heat conductivity higher than a heat conductivity of the resin,

a third end surface of the third region facing the side of the second direction is exposed from the sealing insulator.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2023
From: SANO, YUICHI
To: KIOXIA CORPORATION
Reel/Frame 063162/0616 →
Priority Claims (1)
JP 2022-096612 · Jun 15, 2022 · national
Continuity (1)
Related Publication 20230411239A1 · Dec 21, 2023
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