Semiconductor module
There is provided a semiconductor module capable of preventing the adhesion of an epoxy resin to terminals to which at least one of a large current and a high voltage is supplied. A semiconductor module includes: a sealing section formed of an epoxy resin and sealing transistors; an intermediate terminal having a fastening surface to which a cable connected to a load as a drive target is fastened in a direction intersecting the thickness direction of a sealing section and connected to the transistors; and a structure arranged between the sealing section and the fastening surface and having an input section higher than a surface of the sealing section and the fastening surface.
1 . A semiconductor module comprising:
a sealing section containing epoxy resin and sealing a plurality of switching elements;
an intermediate terminal having a fastening surface at a position higher than a surface of the sealing section, to which a cable connected to a load as a drive target is fastened, and which is connected to the plurality of switching elements;
a case defining a casting region where the sealing section is cast; and
a structure disposed between the sealing section and the fastening surface and having at least a part higher than a surface of the sealing section and the fastening surface,
wherein the structure has
a part of the case which, when viewed in a side view in a direction in which the sealing section and the intermediate terminal are arranged, extends above the fastening surface and includes a portion overlapping the fastening surface, and
a plurality of control terminals which are provided on an upper surface of the part of the case, between the sealing section and the fastening surface, and each control terminal of the plurality of control terminals has a surface having a predetermined spread in the part of the structure such that an entire width of the intermediate terminal is shielded when viewed in the direction in which the sealing section and the intermediate terminal are arranged, the plurality of control terminals being arranged in rows in a plan view, and
the structure is disposed between the sealing section and the fastening surface in the plan view so as to shield the fastening surface.
2 . The semiconductor module according to claim 1 , wherein the plurality of control terminals is arranged in a plurality of rows along a direction intersecting a direction in which the sealing section and the intermediate terminal are arranged.
3 . The semiconductor module according to claim 2 , wherein some of the plurality of control terminals adjacent to each other when viewed in the direction in which the sealing section and the intermediate terminal are arranged are arranged not to overlap each other.
4 . The semiconductor module according to claim 2 , wherein some of the plurality of control terminals each has a through hole penetrating the part in the direction in which the sealing section and the intermediate terminal are arranged.
5 . The semiconductor module according to claim 2 , wherein a control terminal of the plurality of control terminals is configured such that a current smaller than a current flowing to the intermediate terminal flows, and such that a voltage lower than a voltage applied to the intermediate terminal is applied.
6 . The semiconductor module according to claim 3 , wherein some of the plurality of control terminals each has a through hole penetrating the part in the direction in which the sealing section and the intermediate terminal are arranged.
7 . The semiconductor module according to claim 3 , wherein a control terminal of the plurality of control terminals is configured such that a current smaller than a current flowing to the intermediate terminal flows, and such that a voltage lower than a voltage applied to the intermediate terminal is applied.
8 . The semiconductor module according to claim 4 , wherein a control terminal of the plurality of control terminals is configured such that a current smaller than a current flowing to the intermediate terminal flows, and such that a voltage lower than a voltage applied to the intermediate terminal is applied.