Structures for a photonics chip that enable external communication
Structures for a photonics chip that enable external communication and methods of forming such structures. The structure comprises a spot-size converter, a body on a semiconductor substrate, and a dielectric layer on the semiconductor substrate. The body includes a surface adjacent to the spot-size converter and a reflector on the surface. The dielectric layer includes a recess disposed above the spot-size converter and the reflector.
1 . A structure for a photonics chip, the structure comprising:
a semiconductor substrate;
a spot-size converter;
a body on the semiconductor substrate, the body including a surface adjacent to the spot-size converter and a first reflector on the surface;
a first dielectric layer on the semiconductor substrate, the first dielectric layer including a first recess disposed above the spot-size converter and the first reflector; and
a second dielectric layer between the first dielectric layer and the semiconductor substrate, the second dielectric layer including an opening penetrating through the second dielectric layer to a portion of the semiconductor substrate,
wherein the body is disposed inside the opening on the portion of the semiconductor substrate.
2 . The structure of claim 1 wherein the spot-size converter includes a waveguide core disposed on the second dielectric layer adjacent to the first reflector on the surface of the body.
3 . The structure of claim 2 wherein the waveguide core includes a tapered section and an end surface that are adjacent to the first reflector on the surface of the body.
4 . The structure of claim 1 wherein the spot-size converter includes a waveguide core having a longitudinal axis, and the surface of the body and the first reflector on the surface of the body are inclined relative to the longitudinal axis of the waveguide core.
5 . The structure of claim 4 wherein the first reflector comprises a metal layer.
6 . The structure of claim 4 wherein the first reflector is a distributed Bragg reflector including a plurality of first layers and a plurality of second layers that alternate with the first layers, the first layers comprise a first material having a first refractive index, and the second layers comprise a second material having a refractive index different from the first refractive index.
7 . The structure of claim 4 wherein the body comprises a single-crystal semiconductor material having a crystal lattice structure, and the surface of the body is faceted with a surface normal aligned in a crystallographic direction of the crystal lattice structure of the single-crystal semiconductor material.
8 . The structure of claim 1 wherein the first reflector comprises a metal layer.
9 . The structure of claim 1 wherein the first reflector is a distributed Bragg reflector including a plurality of first layers and a plurality of second layers that alternate with the first layers, the first layers comprise a first material having a first refractive index, and the second layers comprise a second material having a refractive index different from the first refractive index.
10 . The structure of claim 1 wherein the surface of the body and the first reflector are curved.
11 . The structure of claim 10 wherein the first reflector comprises a metal layer, and the body comprises a polycrystalline semiconductor material or an amorphous semiconductor material.
12 . The structure of claim 10 wherein the first reflector is a distributed Bragg reflector including a plurality of first layers and a plurality of second layers that alternate with the first layers, the first layers comprise a first material having a first refractive index, and the second layers comprise a second material having a refractive index different from the first refractive index.
13 . A structure for a photonics chip, the structure comprising:
a semiconductor substrate;
a spot-size converter;
a body on the semiconductor substrate, the body including a surface adjacent to the spot-size converter and a first reflector on the surface;
a first dielectric layer on the semiconductor substrate, the first dielectric layer including a first recess and a second recess, the first recess disposed above the spot-size converter and the first reflector, and the second recess disposed above the first reflector; and
a second reflector inside the second recess.
14 . The structure of claim 13 wherein the first reflector comprises a first metal layer, and the second reflector comprises a second metal layer.
15 . The structure of claim 13 further comprising:
a second dielectric layer between the first dielectric layer and the semiconductor substrate, the second dielectric layer including an opening penetrating through the second dielectric layer to a portion of the semiconductor substrate,
wherein the body is disposed inside the opening on the portion of the semiconductor substrate.
16 . The structure of claim 15 wherein the body comprises a single-crystal semiconductor material having a crystal lattice structure, and the surface of the body is faceted with a surface normal aligned in a crystallographic direction of the crystal lattice structure of the single-crystal semiconductor material.
17 . The structure of claim 13 wherein the first dielectric layer includes a top surface, and the first recess and the second recess are recessed below the top surface of the first dielectric layer.
18 . A structure for a photonics chip, the structure comprising:
a semiconductor substrate;
a spot-size converter;
a body on the semiconductor substrate, the body including a surface adjacent to the spot-size converter and a first reflector on the surface;
a first dielectric layer on the semiconductor substrate, the first dielectric layer including a recess disposed above the spot-size converter and the first reflector; and
a second reflector inside the recess.
19 . The structure of claim 18 wherein the first reflector comprises a first metal layer, and the second reflector comprises a second metal layer.
20 . The structure of claim 18 further comprising:
a second dielectric layer between the first dielectric layer and the semiconductor substrate, the second dielectric layer including an opening penetrating through the second dielectric layer to a portion of the semiconductor substrate,
wherein the body is disposed inside the opening on the portion of the semiconductor substrate.