Granted Patent B2

US 12,663,971 · App. 18/424,197 · Granted Jun 23, 2026

Inventors: Yongmo Park (Ann Arbor, MI); Subhankar Pal (White Plains, NY); Aporva Amarnath (White Plains, NY); Alper Buyuktosunoglu (White Plains, NY); Pradip Bose (Yorktown Heights, NY)

Assignee: International Business Machines Corporation

G06F8/4441G06F8/443G06F9/3836G06F9/455

Abstract

Claims (50)

1 . A computer program product for compiling a program having polynomial operations, the computer program product comprising a computer readable storage medium having computer readable program code embodied therein that when executed performs operations, the operations comprising:

compiling an application including operations on a polynomial having coefficients, wherein the coefficients are decomposed into a number of levels of coefficient elements, to generate hierarchical directed acyclic graphs (DAGs) having nodes indicating commands for execution by a hierarchy of hardware components in a near memory processing (NMP) device, wherein the hierarchy of hardware components includes a plurality of enclaves of tiles, wherein an enclave comprises a plurality of tiles, wherein the tiles include memories and processing elements to perform operations on the decomposed coefficients stored in the memories of the tiles, wherein the hardware components include controllers to process the commands in the DAGs generated for execution by the hardware components; and

providing the DAGs to a hierarchical DAG tracker to generate commands for the NMP device.

2 . The computer program product of claim 1 , wherein the commands generated for the tiles include memory commands to read and write the coefficient elements in the memories in the tiles and to have the processing elements in the tiles process the coefficient elements in the memories.

3 . The computer program product of claim 1 , wherein the generated commands include commands for NMP substrates on the NMP device, wherein the NMP substrates include the enclaves.

4 . The computer program product of claim 3 , wherein the commands comprise a hierarchical command list, wherein the hierarchical command list includes an NMP substrate command list for one of the NMP substrates on the NMP device, wherein the NMP substrate command list provides an enclave command list for enclaves on the NMP substrate having the NMP substrate command list, and wherein the enclave command list provides primitive operations to perform on the coefficient elements.

5 . The computer program product of claim 4 , wherein the enclave command list provides a tile command list for each primitive operation indicated on the enclave command list, and wherein the tile command list includes memory commands and operations to perform on the coefficient elements within a tile to implement the primitive operation for which the tile command list is provided.

6 . The computer program product of claim 1 , wherein each level of coefficient elements comprises a limb, and wherein the commands include commands to process coefficient elements for one limb in the tiles of only one enclave.

7 . A computer program product for compiling a program having polynomial operations, the computer program product comprising a computer readable storage medium having computer readable program code embodied therein that when executed performs operations, the operations comprising:

compiling, by a compiler, an application including operations on a polynomial having coefficients, wherein the coefficients are decomposed into a number of levels of coefficient elements, to generate commands in a hierarchical directed acyclic graph (DAG) having nodes indicating commands for execution by a hierarchy of hardware components in a near memory processing (NMP) device including tiles having memories with row buffers and processing elements to perform operations on the coefficient elements; and

forwarding the commands to an NMP device model that models the hierarchy of hardware components in the NMP device and processes the commands to generate information on completion of the commands.

8 . The computer program product of claim 7 , wherein the operations further comprise:

indicating, by the NMP device model, a hardware component, in the hierarchy of hardware components, as busy for a duration of clock cycles to process a command received for the hardware components.

9 . The computer program product of claim 7 , wherein the operations further comprise:

assigning, by a command scheduler, clock cycles for the commands indicating when the commands are executed in the hierarchy of components, wherein the NMP device model indicates a hardware component as busy in response to the hardware component executing a command at a clock cycle assigned by the command scheduler.

10 . The computer program product of claim 7 , wherein the hardware components of the hierarchy of components include NMP substrates on the NMP device, wherein the NMP substrates include a plurality of enclaves, wherein each enclave comprises a plurality of interconnected tiles, wherein the tiles include memories and processing elements to perform operations on decomposed coefficients stored in the memories, and wherein the NMP device model provides a model of the NMP substrates on the NMP device, the enclaves on the NMP substrates, and the tiles in the enclaves.

11 . The computer program product of claim 7 , wherein the operations further comprise:

processing, by a DAG tracker, the DAGs and commands to process at the DAG nodes for the hardware components in the hierarchy of components to track a status of processing the commands and track dependencies of the components;

determining, by a command scheduler, clock cycles for ready commands from the DAG tracker;

sending, by the command scheduler, commands to the NMP device model in response to receiving a signal from the NMP device model that a component represented in the NMP device model is ready to process commands; and

returning, by the NMP device model, indication of completed commands to the DAG tracker.

12 . A system for compiling a program having polynomial operations, comprising:

a processor; and

a computer readable storage medium having computer readable program code embodied therein that when executed performs operations, the operations comprising:

compiling an application including operations on a polynomial having coefficients, wherein the coefficients are decomposed into a number of levels of coefficient elements, to generate hierarchical directed acyclic graphs (DAGs) having nodes indicating commands for execution by a hierarchy of hardware components in a near memory processing (NMP) device, wherein the hierarchy of hardware components includes a plurality of enclaves of tiles, wherein an enclave comprises a plurality of tiles, wherein the tiles include memories and processing elements to perform operations on the decomposed coefficients stored in the memories of the tiles, wherein the hardware components include controllers to process the commands in the DAGs generated for execution by the hardware components; and

providing the DAGs to a hierarchical DAG tracker to generate commands for the NMP device.

13 . The system of claim 12 , wherein the commands generated for the tiles include memory commands to read and write the coefficient elements in the memories in the tiles and to have the processing elements in the tiles process the coefficient elements in the memories.

14 . The system of claim 12 , wherein the generated commands include commands for NMP substrates on the NMP device, wherein the NMP substrates include the enclaves.

15 . The system of claim 14 , wherein the commands comprise a hierarchical command list, wherein the hierarchical command list includes an NMP substrate command list for one of the NMP substrates on the NMP device, wherein the NMP substrate command list provides an enclave command list for enclaves on the NMP substrate having the NMP substrate command list, and wherein the enclave command list provides primitive operations to perform on the coefficient elements.

16 . The system of claim 15 , wherein the enclave command list provides a tile command list for each primitive operation indicated on the enclave command list, and wherein the tile command list includes memory commands and operations to perform on the coefficient elements within a tile to implement the primitive operation for which the tile command list is provided.

17 . A system for compiling a program having polynomial operations, comprising:

a processor; and

a computer readable storage medium having computer readable program code embodied therein that when executed performs operations, the operations comprising:

compiling, by a compiler, an application including operations on a polynomial having coefficients, wherein the coefficients are decomposed into a number of levels of coefficient elements, to generate commands in a hierarchical directed acyclic graph (DAG) having nodes indicating commands for execution by a hierarchy of hardware components in a near memory processing (NMP) device including tiles having memories with row buffers and processing elements to perform operations on the coefficient elements; and

forwarding the commands to an NMP device model that models the hierarchy of hardware components in the NMP device and processes the commands to generate information on completion of the commands.

18 . The system of claim 17 , wherein the operations further comprise:

indicating, by the NMP device model, a hardware component, in the hierarchy of hardware components, as busy for a duration of clock cycles to process a command received for the hardware components.

19 . The system of claim 17 , wherein the hardware components of the hierarchy of components include NMP substrates on the NMP device, wherein the NMP substrates include a plurality of enclaves, wherein each enclave comprises a plurality of interconnected tiles, wherein the tiles include memories and processing elements to perform operations on decomposed coefficients stored in the memories of the tiles, and wherein the NMP device model provides a model of the NMP substrates on the NMP device, the enclaves on the NMP substrates, and the tiles in the enclaves.

20 . The system of claim 17 , wherein the operations further comprise:

processing, by a DAG tracker, the DAGs and commands to process at the DAG nodes for the hardware components in the hierarchy of components to track a status of processing the commands and track dependencies of the components;

determining, by a command scheduler, clock cycles for ready commands from the DAG tracker;

sending, by the command scheduler, commands to the NMP device model in response to receiving a signal from the NMP device model that a component represented in the NMP device model is ready to process commands; and

returning, by the NMP device model, indication of completed commands to the DAG tracker.

21 . A computer implemented method for compiling a program having polynomial operations, comprising:

compiling an application including operations on a polynomial having coefficients, wherein the coefficients are decomposed into a number of levels of coefficient elements, to generate hierarchical directed acyclic graphs (DAGs) having nodes indicating commands for execution by a hierarchy of hardware components in a near memory processing (NMP) device, wherein the hierarchy of hardware components includes a plurality of enclaves of tiles, wherein an enclave comprises a plurality of tiles, wherein the tiles include memories and processing elements to perform operations on the decomposed coefficients stored in the memories of the tiles, wherein the hardware components include controllers to process the commands in the DAGs generated for execution by the hardware components; and

providing the DAGs to a hierarchical DAG tracker to generate commands for the NMP device.

22 . The method of claim 21 , wherein the commands generated for the tiles include memory commands to read and write the coefficient elements in the memories in the tiles and to have the processing elements in the tiles process the coefficient elements in the memories.

23 . The method of claim 21 , wherein the generated commands include commands for NMP substrates on the NMP device, wherein the NMP substrates include the enclaves.

24 . The method of claim 23 , wherein the commands comprise a hierarchical command list, wherein the hierarchical command list includes an NMP substrate command list for one of the NMP substrates on the NMP device, wherein the NMP substrate command list provides an enclave command list for enclaves on the NMP substrate having the NMP substrate command list, and wherein the enclave command list provides primitive operations to perform on the coefficient elements.

25 . The method of claim 24 , wherein the enclave command list provides a tile command list for each primitive operation indicated on the enclave command list, and wherein the tile command list includes memory commands and operations to perform on the coefficient elements within a tile to implement the primitive operation for which the tile command list is provided.

Assignments (1)

Continuity (1)

References Cited (37)