Granted Patent B2

US 12,710,378 · App. 18/797,715 · Granted Aug 18, 2026

Inventor: Xuewen Wang (Milpitas, CA)

Assignee: KLA Corporation

G01N21/9501G01B9/02034H10P72/0611H10P72/0616H10P74/23

Abstract

Claims (93)

1 . A wafer shape metrology system comprising:

a wafer shape metrology sub-system configured to perform shape measurements on top wafers and bottom wafers; and

a controller communicatively coupled to the wafer shape metrology sub-system, the controller including one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configured to cause the one or more processors to:

receive shape measurements for a set of top wafers from the wafer shape sub-system;

receive shape measurements for a set of bottom wafers from the wafer shape sub-system;

sort the set of top wafers and the bottom wafers into wafer groups based on the shape measurements for the set of top wafers and the shape measurements for the set of bottom wafers;

tag each top wafer with a wafer group number and store in memory;

tag each bottom wafer with a wafer group number and store in memory;

determine wafer pairs from selected wafer groups to establish a set of wafer pairs and calculate a bow difference for each wafer pair of the set of wafer pairs;

sort the set of wafer pairs into wafer pair groups based on intervals of the bow difference;

associate each wafer pair group with a corresponding reference recipe; and

direct a bonder to bond the wafer pairs in a selected wafer pair group according to a corresponding reference recipe associated with the selected wafer pair group.

2 . The system of claim 1 , wherein the selected wafer pair group comprises a largest wafer pair group.

3 . The system of claim 1 , further comprising:

predict at least one of post-bonding overlay or defects of one or more bonded wafer pairs.

4 . The system of claim 1 , further comprising:

measure at least one of post-bonding overlay or defects of one or more bonded wafer pairs with at least one an overlay metrology tool or a defect inspection tool.

5 . The system of claim 4 , further comprising:

compare the predicted post-bonding overlay or defects to measured post-bonding overlay or defects.

6 . The system of claim 5 , further comprising:

provide one or more feedback adjustments to one or more corresponding reference recipes based on a difference between the predicted post-bonding overlay or defects to measured post-bonding overlay or defects.

7 . The system of claim 5 , further comprising:

provide one or more feedback adjustments or feedforward adjustments to one or more process tools based on a difference between the predicted post-bonding overlay or defects to measured post-bonding overlay or defects.

8 . The system of claim 1 , wherein the set of program instructions are configured to cause the one or more processors to:

following sorting the set of top wafers and the bottom wafers into the wafer groups, tag each top wafer with a wafer group number and store in memory.

9 . The system of claim 1 , wherein the set of program instructions are configured to cause the one or more processors to:

following sorting the set of top wafers and the bottom wafers into the wafer groups, tag each bottom wafer with a wafer group number and store in memory.

10 . The system of claim 1 , wherein the wafer shape metrology sub-system is configured to perform stress-free shape measurements on top wafers and bottom wafers.

11 . The system of claim 1 , wherein the top wafer comprises a 3D NAND wafer.

12 . The system of claim 1 , wherein the bottom wafer comprises a logic wafer.

13 . A wafer shape metrology system comprising:

a wafer shape metrology sub-system configured to perform shape measurements on top wafers and bottom wafers; and

a controller communicatively coupled to the wafer shape metrology sub-system, the controller including one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configured to cause the one or more processors to:

receive the shape measurements for a set of top wafers from the wafer shape sub-system;

receive shape measurements for a set of bottom wafers from the wafer shape sub-system;

sort the set of top wafers and the bottom wafers into wafer groups based on the shape measurements for the set of top wafers and the shape measurements for the set of bottom wafers;

tag each top wafer with a wafer group number and store in memory;

tag each bottom wafer with a wafer group number and store in memory;

determine top wafer pairs from selected top wafer groups to establish a set of top wafer pairs;

sort the set of top wafer pairs into top wafer pair groups;

associate each top wafer pair group with a corresponding reference recipe, wherein each top wafer pair group is associated with a bottom wafer pair group in a pre-established manner; and

direct a bonder to bond the wafer pairs in a selected wafer pair group according to a corresponding reference recipe associated with the selected wafer pair group.

14 . The system of claim 13 , further comprising:

predict at least one of post-bonding overlay or defects of one or more bonded wafer pairs.

15 . The system of claim 14 , further comprising:

measure at least one of post-bonding overlay or defects of one or more bonded wafer pairs with at least one an overlay metrology tool or a defect inspection tool.

16 . The system of claim 15 , further comprising:

compare the predicted post-bonding overlay or defects to measured post-bonding overlay or defects.

17 . The system of claim 16 , further comprising:

provide one or more feedback adjustments to one or more corresponding reference recipes based on a difference between the predicted post-bonding overlay or defects to measured post-bonding overlay or defects.

18 . The system of claim 16 , further comprising:

provide one or more feedback adjustments or feedforward adjustments to one or more process tools based on a difference between the predicted post-bonding overlay or defects to measured post-bonding overlay or defects.

19 . The system of claim 13 , wherein the set of program instructions are configured to cause the one or more processors to:

following sorting the set of top wafers and the bottom wafers into the wafer groups, tag each top wafer with a wafer group number and store in memory.

20 . The system of claim 13 , wherein the set of program instructions are configured to cause the one or more processors to:

following sorting the set of top wafers and the bottom wafers into the wafer groups, tag each bottom wafer with a wafer group number and store in memory.

21 . The system of claim 13 , wherein the wafer shape metrology sub-system is configured to perform stress-free shape measurements on top wafers and bottom wafers.

22 . The system of claim 13 , wherein the top wafer comprises a 3D NAND wafer.

23 . The system of claim 13 , wherein the bottom wafer comprises a logic wafer.

24 . A system comprising:

a controller, the controller including one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configured to cause the one or more processors to:

receive shape measurements for a set of top wafers from a wafer shape sub-system;

receive shape measurements for a set of bottom wafers from the wafer shape sub-system;

sort the set of top wafers and the bottom wafers into wafer groups based on the shape measurements for the set of top wafers and the shape measurements for the set of bottom wafers;

determine wafer pairs from selected wafer groups to establish a set of wafer pairs and calculate a bow difference for each wafer pair of the set of wafer pairs;

sort the set of wafer pairs into wafer pair groups based on intervals of the bow difference;

associate each wafer pair group with a corresponding reference recipe; and

direct a bonder to bond the wafer pairs in a selected wafer pair group according to a corresponding reference recipe associated with the selected wafer pair group.

25 . A system comprising:

a controller, the controller including one or more processors configured to execute a set of program instructions stored in a memory, the set of program instructions configured to cause the one or more processors to:

receive shape measurements for a set of top wafers from a wafer shape sub-system;

receive shape measurements for a set of bottom wafers from the wafer shape sub-system;

sort the set of top wafers and the bottom wafers into wafer groups based on the shape measurements for the set of top wafers and the shape measurements for the set of bottom wafers;

determine top wafer pairs from selected top wafer groups to establish a set of top wafer pairs;

sort the set of top wafer pairs into top wafer pair groups;

associate each top wafer pair group with a corresponding reference recipe, wherein each top wafer pair group is associated with a bottom wafer pair group in a pre-established manner; and

direct a bonder to bond the wafer pairs in a selected wafer pair group according to a corresponding reference recipe associated with the selected wafer pair group.

26 . A method comprising:

receiving shape measurements for a set of top wafers from a wafer shape sub-system;

receiving shape measurements for a set of bottom wafers from the wafer shape sub-system;

sorting the set of top wafers and the bottom wafers into wafer groups based on the shape measurements for the set of top wafers and the shape measurements for the set of bottom wafers;

determining wafer pairs from selected wafer groups to establish a set of wafer pairs and calculate a bow difference for each wafer pair of the set of wafer pairs;

sorting the set of wafer pairs into wafer pair groups based on intervals of the bow difference;

associating each wafer pair group with a corresponding reference recipe; and

directing a bonder to bond the wafer pairs in a selected wafer pair group according to a corresponding reference recipe associated with the selected wafer pair group.

27 . A method comprising:

receiving shape measurements for a set of top wafers from a wafer shape sub-system;

receiving shape measurements for a set of bottom wafers from the wafer shape sub-system;

sorting the set of top wafers and the bottom wafers into wafer groups based on the shape measurements for the set of top wafers and the shape measurements for the set of bottom wafers;

determining top wafer pairs from selected top wafer groups to establish a set of top wafer pairs;

sorting the set of top wafer pairs into top wafer pair groups;

associating each top wafer pair group with a corresponding reference recipe, wherein each top wafer pair group is associated with a bottom wafer pair group in a pre-established manner; and

directing a bonder to bond the wafer pairs in a selected wafer pair group according to a corresponding reference recipe associated with the selected wafer pair group.

Assignments (1)

Continuity (1)

References Cited (15)