Electronic device including connector
An electronic device includes a housing and a connector disposed in the housing. The connector includes a case forming an outer surface of the connector and having an opening formed in at least a portion of the outer surface and a printed circuit board disposed in the case and including a first layer where a plurality of first pins are disposed, a second layer where a plurality of second pins are disposed, and a ground layer disposed between the first layer and the second layer and disposed to maintain a substantially constant distance from the first layer and the second layer. The plurality of first pins includes at least one first ground pin. The plurality of second pins includes at least one second ground pin. The first ground pin and the second ground pin are configured to be connected through at least one via.
1 . An electronic device comprising:
a housing;
a main printed circuit board disposed in the housing; and
a connector disposed in the housing and electrically connected with the main printed circuit board wherein the connector is configured to couple to an external connector,
wherein the connector comprises:
a case; and
a printed circuit board disposed in the case, exposed via an opening of the case and comprising:
a first layer where a plurality of first pins are disposed;
a second layer where a plurality of second pins are disposed; and
a ground layer disposed between the first layer and the second layer and disposed to maintain a substantially constant distance from the first layer and the second layer,
wherein: the plurality of first pins comprise
two first ground pins respectively disposed at two outermost positions;
two first power pins disposed between the two first ground pins; and,
two first super speed transmission pins respectively disposed between one of the two first ground pins and one of the two first power pins near to each other,
wherein the plurality of second pins comprise;
two second ground pins respectively disposed at two outermost positions;
two second power pins disposed between the two second ground pins;
two second super speed transmission pins respectively disposed between one of the two second ground pins and one of the two second power pins near to each other,
wherein the two first ground pins and the two second ground pins are connected through a plurality of vias arranged along the first ground pin and the second ground pin, and
wherein the two first ground pins and the two second ground pins are connected to the ground layer through the plurality of vias.
2 . The electronic device of claim 1 , wherein the ground layer is a return path for the plurality of first pins and the plurality of second pins and comprises a mesh ground in which at least some ground electrodes of the ground layer are disposed in a mesh form.
3 . The electronic device of claim 1 , wherein the printed circuit board is disposed in a central portion of an inside of the opening formed in the case.
4 . The electronic device of claim 1 , wherein the plurality of vias comprises:
a first via connecting a first pair of a first one of the outermost first ground pins, a first one of the outermost second ground pins and the ground layer; and
a second via connecting a second pair of a second one of the outermost first ground pins, a second one of the outermost second ground pins and the ground layer.
5 . The electronic device of claim 2 , wherein:
the first and second super speed transmission (TX) pins are capable of fast data transmission, and
the mesh ground is formed at positions corresponding to positions where the first and second super speed transmission (TX) pins are disposed.
6 . The electronic device of claim 1 , wherein the ground layer comprises:
a first ground layer; and
a second ground layer disposed under the first ground layer, and
wherein the first ground layer and the second ground layer are configured to be connected through a plurality of vias disposed at regular intervals.
7 . The electronic device of claim 1 , wherein the first layer comprises:
a 1-1th layer; and
a 1-2th layer disposed under the 1-1th layer, and
wherein the 1-1th layer and the 1-2th layer are configured to be connected through a plurality of vias disposed at regular intervals.
8 . The electronic device of claim 1 , wherein:
the printed circuit board comprises:
a plurality of conductive layers comprising the first layer, the second layer, and the ground layer; and
an insulating layer disposed between conductive layers of the plurality of conductive layers, and
the insulating layer comprises a dielectric material having a permittivity of 0.02 or less.
9 . The electronic device of claim 2 , wherein the printed circuit board comprises:
a first area formed of a rigid printed circuit board;
a second area extending from the first area and formed of a flexible printed circuit board; and
a third area extending from the second area and formed of a rigid printed circuit board,
wherein the mesh ground is formed at a position corresponding to the second area.
10 . The electronic device of claim 1 , wherein:
the opening is formed to be coupled with an external connector in a forward or reverse direction,
the plurality of first pins correspond to the forward direction, and
the plurality of second pins correspond to the reverse direction.
11 . The electronic device of claim 1 , wherein the connector is a universal serial bus (USB) type-C connector.
12 . An electronic device comprising:
a housing;
a main printed circuit board disposed in the housing; and
a connector disposed in the housing and electrically connected with the main printed circuit board,
wherein the connector comprises:
a case forming an outer surface of the connector and having an opening formed in at least a portion of the outer surface; and
a printed circuit board disposed in the case and comprising:
a first layer where a plurality of first pins are disposed;
a second layer where a plurality of second pins are disposed; and
a ground layer disposed between the first layer and the second layer and disposed to maintain a substantially constant distance from the first layer and the second layer,
wherein: the plurality of first pins comprise
two first ground pins respectively disposed at two outermost positions;
two first power pins disposed between the two first ground pins; and,
two first super speed transmission pins respectively disposed between one of the two first ground pins and one of the two first power pins near to each other,
wherein the plurality of second pins comprise;
two second ground pins respectively disposed at two outermost positions;
two second power pins disposed between the two second ground pins;
two second super speed transmission pins respectively disposed between one of the two second ground pins and one of the two second power pins near to each other,
wherein the ground layer comprises a mesh ground in which at least some ground electrodes of the ground layer are disposed in a mesh form.
13 . The electronic device of claim 12 , wherein the printed circuit board comprises:
a first area formed of a rigid printed circuit board;
a second area extending from the first area and formed of a flexible printed circuit board; and
a third area extending from the second area and formed of a rigid printed circuit board.
14 . The electronic device of claim 13 , wherein the mesh ground is formed at a position corresponding to the second area.
15 . The electronic device of claim 12 , wherein:
the first and second super speed transmission (TX) pins are capable of fast data transmission, and
the mesh ground is formed at positions corresponding to positions where the first and second super speed transmission (TX) pins are disposed.
16 . The electronic device of claim 12 , wherein a conductor of the connector is formed of copper (Cu).
17 . A printed circuit board (PCB) of an electronic device connector, the PCB comprising:
a first layer with first pins arranged at regular intervals and comprising two first ground pins at outermost positions, two first power pins, first signal pins, and a first super speed transmission (TX) pin;
a second layer with second pins arranged at regular intervals in alignment with the first pins and comprising two second ground pins connected to the two first ground pins through first via, two second power pins connected to the two first power pins through second vias second signal pins and a second super speed TX pin; and
a ground layer to maintain distance between the first and second layers and through which the first and second vias extend.
18 . The PCB of claim 17 , wherein:
the ground layer comprises a mesh ground in which a ground electrode is disposed in a mesh form, and
the ground layer comprises:
a first ground layer; and
a second ground layer disposed under the first ground layer and connected with the first ground layer through vias disposed at regular intervals.
19 . The PCB of claim 17 , wherein the first layer comprises:
a 1-1th layer; and
a 1-2th layer disposed under the 1-1th layer and connected with the 1-1th layer through vias disposed at regular intervals.