Image sensor and operating method thereof
An image sensor includes a readout circuit configured to convert electrical signals received from a pixel array into image data, and an image signal processor configured to process the image data. The image signal processor includes a clock consumer configured to generate a first clock request signal and receive a first clock signal, a block clock management unit configured to receive the first clock request signal from the clock consumer, generate a second clock request signal corresponding to the first clock request signal, and receive a clock response signal and a second clock signal corresponding to the second clock request signal, and a top clock management unit configured to receive the second clock request signal from the block clock management unit, generate the clock response signal and the second clock signal, and transmit the clock response signal and the second clock signal to the block clock management unit.
1 . An image sensor, comprising:
a pixel array including a plurality of sensing pixels;
a readout circuit configured to convert electrical signals received from the pixel array into image data; and
an image signal processor configured to process the image data output from the readout circuit,
wherein the image signal processor includes
a clock consumer configured to generate a first clock request signal and receive a first clock signal corresponding to the first clock request signal,
a block clock management unit configured to
receive the first clock request signal from the clock consumer,
generate a second clock request signal corresponding to the first clock request signal, and
receive a clock response signal and a second clock signal corresponding to the second clock request signal, and
a top clock management unit configured to
receive the second clock request signal from the block clock management unit,
generate the clock response signal and the second clock signal corresponding to the second clock request signal, and
transmit the clock response signal and the second clock signal to the block clock management unit, and
wherein the block clock management unit is configured to
generate the first clock signal corresponding to the first clock request signal, based on the second clock signal, and
transmit the first clock signal to the clock consumer.
2 . The image sensor of claim 1 , wherein
the block clock management unit is configured to transmit the first clock signal corresponding to the first clock request signal from a time at which reception of the first clock request signal starts to a time at which reception of the first clock request signal stops.
3 . The image sensor of claim 1 , wherein
the block clock management unit includes:
a clock gate unit configured to transmit the first clock signal, and
an adapter configured to control the clock gate unit, and
the adapter is configured to
transmit the first clock signal through the clock gate unit in response to the first clock request signal being transmitted from the clock consumer, and
block transmission of the first clock signal by the clock gate unit in response to transmission of the first clock request signal from the clock consumer being stopped.
4 . The image sensor of claim 1 , further comprising:
an analog control logic configured to transmit a start signal indicating an end point of a vertical blank period of an image frame to the clock consumer,
wherein the clock consumer is configured to generate the first clock request signal in response to the start signal.
5 . The image sensor of claim 1 , further comprising:
an analog control logic configured to transmit a start signal indicating an end point of a vertical blank period of an image frame to the clock consumer; and
an enable register configured to generate an enable signal for controlling activation of operation of the clock consumer to the clock consumer,
wherein the clock consumer is configured to
generate the first clock request signal in response to the start signal based on the enable signal being an activation signal, and
refrain from responding to the start signal based on the enable signal being a deactivation signal.
6 . The image sensor of claim 1 , further comprising:
a register configured to control activation of operation of the clock consumer,
wherein the register is configured to generate the first clock request signal.
7 . The image sensor of claim 1 , wherein
the block clock management unit is configured to transmit the first clock signal corresponding to the first clock request signal from a time at which reception of the first clock request signal starts to a time at which a margin value has elapsed since reception of the first clock request signal was stopped.
8 . An image sensor, comprising:
a plurality of clock consumers, each clock consumer of the plurality of clock consumers configured to generate a first clock request signal and receive a first clock signal corresponding to the first clock request signal;
a block clock management unit configured to
receive the first clock request signal from each of the plurality of clock consumers,
generate a second clock request signal corresponding to the first clock request signal, and
receive a clock response signal and a second clock signal corresponding to the second clock request signal; and
a top clock management unit configured to
receive the second clock request signal from the block clock management unit,
generate the clock response signal and the second clock signal corresponding to the second clock request signal, and
transmit the clock response signal and the second clock signal to the block clock management unit,
wherein the block clock management unit is configured to
generate the first clock signal corresponding to the first clock request signal, based on the second clock signal, and
transmit the first clock signal to each of the plurality of clock consumers, and
wherein the block clock management unit is configured to
generate the second clock request signal in response to receiving the first clock request signal from at least one clock consumer among the plurality of clock consumers, and
stop generating the second clock request signal in response to transmission of the first clock request signal from all of the plurality of clock consumers being stopped.
9 . The image sensor of claim 8 , wherein
the top clock management unit is configured to transmit and receive the second clock request signal, the clock response signal, and the second clock signal to and from each of a plurality of block clock management units, the plurality of block clock management units including the block clock management unit.
10 . The image sensor of claim 8 , wherein
the plurality of clock consumers include a first clock consumer and a second clock consumer,
wherein the image sensor further comprises:
an analog control logic configured to transmit a start signal indicating an end point of a vertical blank period of an image frame to the first clock consumer, and
a register configured to control activation of operation of the second clock consumer, and
the first clock consumer is configured to generate the first clock request signal in response to the start signal, and the first clock request signal of the second clock consumer is generated by the register.
11 . The image sensor of claim 10 , wherein
the first clock consumer is configured to generate the first clock request signal at a time that is different from a time at which the register generates the first clock request signal.
12 . The image sensor of claim 8 , wherein
the block clock management unit is configured to transmit the first clock signal corresponding to the first clock request signal from a time at which reception of the first clock request signal starts to a time at which a margin value has elapsed since reception of the first clock request signal was stopped, and
the plurality of clock consumers include a first clock consumer and a second clock consumer, and a first margin value of the first clock consumer is different from a second margin value of the second clock consumer.
13 . The image sensor of claim 8 , wherein
the plurality of clock consumers include a first clock consumer and a second clock consumer, and
the first clock consumer and the second clock consumer are each configured to receive the first clock signal corresponding to the first clock request signal generated by the first clock consumer.
14 . The image sensor of claim 8 , wherein
the plurality of clock consumers include a first clock consumer and a second clock consumer,
the first clock consumer is configured to receive the first clock signal corresponding to the first clock request signal generated by the first clock consumer, and
the second clock consumer is configured to receive the first clock signal corresponding to at least one of the first clock request signal generated by the first clock consumer or the first clock request signal generated by the second clock consumer.
15 . An operating method of an image sensor, the image sensor including a clock consumer, a block clock management unit, and a top clock management unit, the operating method comprising:
generating, by the clock consumer, a first clock request signal;
transmitting, by the clock consumer, the first clock request signal to the block clock management unit;
generating, by the block clock management unit, a second clock request signal corresponding to the first clock request signal;
transmitting, by the block clock management unit, the second clock request signal to the top clock management unit;
generating, by the top clock management unit, a clock response signal and a second clock signal corresponding to the second clock request signal;
transmitting, by the top clock management unit, the clock response signal and the second clock signal to the block clock management unit;
transmitting, by the block clock management unit, a first clock signal corresponding to the first clock request signal to the clock consumer, based on the second clock signal; and
stopping, by the block clock management unit, transmission of the first clock signal to the clock consumer in response to transmission of the first clock request signal by the clock consumer being stopped.
16 . The operating method of claim 15 , further comprising:
stopping, by the block clock management unit, transmission of the first clock signal to the clock consumer in response to transmission of the first clock request signal by the clock consumer being stopped.
17 . The operating method of claim 15 , wherein
the image sensor further includes an analog control logic, and
the generating of the first clock request signal by the clock consumer includes
generating, by the clock consumer, the first clock request signal in response to a start signal indicating an end point of a vertical blank period of an image frame received from the analog control logic.
18 . The operating method of claim 15 , wherein
the image sensor further includes an analog control logic and an enable register, and
the generating of the first clock request signal by the clock consumer includes
generating, by the clock consumer, the first clock request signal in response to
a start signal indicating an end point of a vertical blank period of an image frame received from the analog control logic and
an enable signal for controlling activation of operation of the clock consumer generated by the enable register being an activation signal.
19 . The operating method of claim 15 , wherein
the image sensor further includes a register, and
the generating of the first clock request signal by the clock consumer includes receiving, by the clock consumer, the first clock request signal from the register.
20 . The operating method of claim 15 , wherein
the stopping, by the block clock management unit, transmission of the first clock signal to the clock consumer in response to transmission of the first clock request signal by the clock consumer being stopped includes
stopping, by the block clock management unit, transmission of the first clock signal to the clock consumer at a time at which a particular cycle has elapsed since a time at which reception of the first clock request signal by the clock consumer was stopped.