Semiconductor device
A semiconductor device includes a sequence data generator, which is configured to generate sequence data on a plurality of data lines, and a symbol changer. The symbol changer is configured to generate a training pattern from the sequence data by replacing, for each of the plurality of data lines, each occurrence of a bitstream within the sequence data that has a predetermined symbol with an alternative symbol. The sequence data generator may include a sequence generator, which is configured to generate a pseudo random binary sequence (PRBS), based on a seed value for each clock cycle.
1 . A semiconductor device, comprising:
a sequence data generator configured to generate sequence data;
a symbol changer configured to generate a training pattern from the sequence data by replacing each occurrence of a bitstream within the sequence data that has a predetermined symbol with an alternative symbol; and
a driver configured to output the training pattern to an external semiconductor device, wherein the predetermined symbol corresponds to an invalid symbol for a modulation scheme of the driver.
2 . The semiconductor device of claim 1 , wherein the sequence data generator comprises:
a sequence generator configured to generate a pseudo random binary sequence (PRBS), based on a seed value for each clock cycle; and
a scrambler configured to generate the sequence data by performing an XOR operation between an option value having a same number of bits as the PRBS, and the PRBS.
3 . The semiconductor device of claim 2 , wherein the symbol changer comprises:
a symbol generator configured to generate and output the alternative symbol for each clock cycle;
a detector configured to output a selection signal at a predetermined logic level in response to detecting each occurrence of the predetermined symbol within the sequence data; and
a selector configured to replace each occurrence of the predetermined symbol within the sequence data with the alternative symbol, according to the predetermined logic level of the selection signal.
4 . The semiconductor device of claim 3 , wherein the symbol generator cyclically generates and outputs the alternative symbol as a different value for each of a plurality of clock cycles.
5 . The semiconductor device of claim 4 ,
wherein the symbol generator generates a plurality of alternative symbols including a first alternative symbol and a second alternative symbol having different values for each of the plurality of clock cycles; and
wherein when a plurality of bitstreams are grouped into a plurality of groups including two or more bitstreams, the symbol changer uses the first alternative symbol as the alternative symbol in a first group among the plurality of groups, and uses the second alternative symbol as the alternative symbol in a second group among the plurality of groups.
6 . The semiconductor device of claim 3 , wherein:
the detector includes a plurality of pattern detectors which segment and receive the sequence data into a plurality of bit units, and outputs the selection signal at an enable level when a plurality of consecutive bitstreams received by a unit of the plurality of bit units is the same as the predetermined symbol; and
wherein the selector includes a plurality of multiplexers, with each multiplexer including a first input stage which receives and segments the sequence data by the unit of the plurality of bit units, a second input stage into which the alternative symbol is input, and an output stage that outputs: (i) the plurality of consecutive bitstreams received by the unit of the plurality of bit units, or (ii) the alternative symbol, according to the enable level of the selection signal.
7 . The semiconductor device of claim 1 , further comprising:
a receiver configured to receive a plurality of external training patterns from the external semiconductor device; and
a training module configured to generate a counting value indicating whether the plurality of external training patterns and a plurality of training patterns match each other; and
wherein the driver outputs the counting value to the external semiconductor device.
8 . The semiconductor device of claim 7 , wherein:
the receiver includes a plurality of samplers for sampling the plurality of external training patterns based on a clock signal provided from the external semiconductor device.
9 . The semiconductor device of claim 8 , wherein the training module comprises:
a plurality of scramblers configured to output a plurality of result data by performing an XOR operation between a plurality of sampling data output by the plurality of samplers and the plurality of training patterns; and
a plurality of counters configured to count a value indicating that the plurality of sampling data and the plurality of training patterns do not match each other, to generate the counting value in the plurality of result data.
10 . A semiconductor device, comprising:
a sequence data generator configured to generate sequence data;
a symbol changer configured to generate a training pattern from the sequence data by replacing each occurrence of a bitstream within the sequence data that has a predetermined symbol with an alternative symbol, wherein the symbol changer comprises:
a symbol generator configured to generate and output the alternative symbol for each clock cycle;
a detector configured to output a selection signal at a predetermined logic level in response to detecting each occurrence of the predetermined symbol within the sequence data; and
a selector configured to replace each occurrence of the predetermined symbol within the sequence data with the alternative symbol, according to the predetermined logic level of the selection signal; and
a driver configured to output the training pattern to an external semiconductor device.
11 . The semiconductor device of claim 10 , wherein the sequence data generator comprises:
a sequence generator configured to generate a pseudo random binary sequence (PRBS), based on a seed value for each clock cycle; and
a scrambler configured to generate the sequence data by performing an XOR operation between an option value having a same number of bits as the PRBS, and the PRBS.
12 . The semiconductor device of claim 10 , wherein the symbol generator cyclically generates and outputs the alternative symbol as a different value for each of a plurality of clock cycles.
13 . The semiconductor device of claim 10 ,
wherein the symbol generator generates a plurality of alternative symbols including a first alternative symbol and a second alternative symbol having different values for each of a plurality of clock cycles; and
wherein when a plurality of bitstreams are grouped into a plurality of groups including two or more bitstreams, the symbol changer uses the first alternative symbol as the alternative symbol in a first group among the plurality of groups, and uses the second alternative symbol as the alternative symbol in a second group among the plurality of groups.
14 . The semiconductor device of claim 10 , wherein:
the detector includes a plurality of pattern detectors which segment and receive the sequence data into a plurality of bit units, and outputs the selection signal at an enable level when a plurality of consecutive bitstreams received by the unit of the plurality of bits is the same as the predetermined symbol; and
wherein the selector includes a plurality of multiplexers, with each multiplexer including a first input stage which receives and segments the sequence data by the unit of the plurality of bits, a second input stage into which the alternative symbol is input, and an output stage that outputs: (i) the plurality of consecutive bitstreams received by the unit of the plurality of bits, or (ii) the alternative symbol, according to a level of the selection signal.
15 . The semiconductor device of claim 10 , further comprising:
a receiver configured to receive a plurality of external training patterns from the external semiconductor device; and
a training module configured to generate a counting value indicating whether the plurality of external training patterns and a plurality of training patterns match each other; and
wherein the driver outputs the counting value to the external semiconductor device.
16 . The semiconductor device of claim 15 , wherein:
the receiver includes a plurality of samplers for sampling the plurality of external training patterns based on a clock signal provided from the external semiconductor device.
17 . The semiconductor device of claim 16 , wherein the training module comprises:
a plurality of scramblers configured to output a plurality of result data by performing an XOR operation between a plurality of sampling data output by the plurality of samplers and the plurality of training patterns; and
a plurality of counters configured to count a value indicating that the plurality of sampling data and the plurality of training patterns do not match each other, to generate the counting value in the plurality of result data.
18 . A semiconductor device, comprising:
a sequence data generator configured to generate sequence data;
a symbol changer configured to generate a training pattern from the sequence data by replacing each occurrence of a bitstream within the sequence data that has a predetermined symbol with an alternative symbol, wherein the sequence data and the training pattern have a same number of bits;
a driver configured to output the training pattern to an external semiconductor device.
19 . The semiconductor device of claim 18 , further comprising:
a receiver configured to receive a plurality of external training patterns from the external semiconductor device; and
a training module configured to generate a counting value indicating whether the plurality of external training patterns and a plurality of training patterns match each other; and
wherein the driver outputs the counting value to the external semiconductor device.