Electrostatic discharge protection
View Patent ↗A semiconductor device includes a conductive layer extending along a first lateral direction; a gate dielectric layer disposed over the conductive layer; a channel layer disposed over the gate dielectric layer and extending along a second lateral direction perpendicular to the first lateral direction; a first via-like structure, in direct contact with the channel layer, that is disposed along a first edge of the channel layer extending along the second lateral direction; and a second via-like structure, in direct contact with the channel layer, that is disposed along a second, opposite edge of the channel layer extending along the second lateral direction. The first via-like structure and second via-like structure are laterally separated apart along a third lateral direction that is clockwise tilted from the second lateral direction with a first positive angle.
1 . A device, comprising:
an electrostatic discharge (ESD) detector to detect an ESD at a pad;
a drive circuit configured to provide the pad with an output signal, and including a first portion and a second portion connected in series with each other, wherein the output signal swinging between a first supply voltage and a first reference voltage;
a first protection circuit operating in a first power domain between the first supply voltage and a second reference voltage, and configured to disable the first portion of the drive circuit, in response to the ESD detected by the ESD detector; and
a second protection circuit operating in a second power domain between a second supply voltage and the first reference voltage, and configured to disable the second portion of the drive circuit, in response to the ESD detected by the ESD detector.
2 . The device of claim 1 , wherein the first portion of the drive circuit includes a plurality of P-type transistors connected in series with each other, and the second portion of the drive circuit includes a plurality of N-type transistors connected in series with each other.
3 . The device of claim 2 ,
wherein the P-type transistors are connected in series between the pad and a first metal rail, the first metal rail to provide the first supply voltage; and
wherein the N-type transistors are connected in series between the pad and a second metal rail, the second metal rail to provide the first reference voltage.
4 . The device of claim 3 ,
wherein the first protection circuit includes a first transistor configured to apply the first supply voltage to a gate electrode of one of the P-type transistors, in response to the ESD detected by the ESD detector; and
wherein the second protection circuit includes a second transistor configured to apply the first reference voltage to a gate electrode of one of the N-type transistors, in response to the ESD detected by the ESD detector.
5 . The device of claim 4 ,
wherein the first protection circuit includes a first transmission gate to electrically float a gate electrode of another one of the P-type transistors, in response to the ESD detected by the ESD detector; and
wherein the second protection circuit includes a second transmission gate to electrically float a gate electrode of another one of the N-type transistors, in response to the ESD detected by the ESD detector.
6 . The device of claim 1 ,
wherein the first protection circuit is configured to enable the first portion of the drive circuit to generate the output signal, in response to the ESD not detected by the ESD detector; and
wherein the second protection circuit is configured to enable the second portion of the drive circuit to generate the output signal, in response to the ESD not detected by the ESD detector.
7 . The device of claim 1 , further comprising:
a first logic circuit configured to provide a first signal swinging between the first supply voltage and the second reference voltage to the first portion of the drive circuit.
8 . The device of claim 1 , further comprising:
a second logic circuit to provide a second signal swinging between the second supply voltage and the first reference voltage to the second portion of the drive circuit.
9 . The device of claim 8 , wherein the first portion of the drive circuit and the second portion of the drive circuit are configured to generate the output signal swinging between the first supply voltage and the first reference voltage, according to the first signal and the second signal, while the first and second portions of the drive circuit are enabled.
10 . The device of claim 1 , wherein the ESD detector operates in an additional power domain between the first supply voltage and the first reference voltage.
11 . The device of claim 10 , further comprising:
a first discharge circuit coupled between the pad and a first metal rail, the first metal rail to provide the first supply voltage; and
a second discharge circuit coupled between the pad and a second metal rail, the second metal rail to provide the first reference voltage;
wherein the ESD detector is configured to detect the ESD at the pad, according to a first current through the first discharge circuit or a second current through the second discharge circuit.
12 . The device of claim 11 , wherein the first discharge circuit includes one or more diodes connected in series between the first metal rail and the pad, wherein the second discharge circuit includes one or more diodes connected in series between the pad and the second metal rail.
13 . The device of claim 1 , wherein the ESD detector operates in the another power domain between the second supply voltage and the first reference voltage.
14 . The device of claim 13 , further comprising:
a first discharge circuit coupled between the pad and a first metal rail, the first metal rail to provide the second supply voltage; and
a second discharge circuit coupled between the pad and a second metal rail, the second metal rail to provide the first reference voltage,
wherein the ESD detector is to detect an ESD at the pad, according to a first current through the first discharge circuit or a second current through the second discharge circuit.
15 . A device comprising:
an electrostatic discharge (ESD) detector to detect an ESD at a pad;
a drive circuit configured to provide the pad with an output signal, and including a first portion and a second portion connected in series with each other;
a first protection circuit operating in a first power domain, and configured to disable the first portion of the drive circuit, in response to the ESD detected by the ESD detector; and
a second protection circuit operating in a second power domain, and configured to disable the second portion of the drive circuit, in response to the ESD detected by the ESD detector.
16 . The device of claim 15 , wherein the output signal swinging between a first supply voltage and a first reference voltage, the first power domain is between the first supply voltage and a second reference voltage, and the second power domain is between a second supply voltage and the first reference voltage.
17 . The device of claim 15 , wherein the first portion of the drive circuit includes a plurality of P-type transistors connected in series with each other, and the second portion of the drive circuit includes a plurality of N-type transistors connected in series with each other.
18 . The device of claim 15 ,
wherein the first protection circuit is configured to enable the first portion of the drive circuit to generate the output signal, in response to the ESD not detected by the ESD detector; and
wherein the second protection circuit is configured to enable the second portion of the drive circuit to generate the output signal, in response to the ESD not detected by the ESD detector.
19 . A device, comprising:
an electrostatic discharge (ESD) detector to detect an ESD at a pad;
a drive circuit configured to provide the pad with an output signal, and including a first portion and a second portion connected in series with each other, wherein the output signal swinging between a first supply voltage and a first reference voltage;
a first protection circuit operating in a first power domain between the first supply voltage and a second reference voltage, wherein the first protection circuit is configured to disable the first portion of the drive circuit, in response to the ESD detected by the ESD detector, and enable the first portion of the drive circuit to generate the output signal, in response to the ESD not detected by the ESD detector; and
a second protection circuit operating in a second power domain between a second supply voltage and the first reference voltage, wherein the second protection circuit is configured to disable the second portion of the drive circuit, in response to the ESD detected by the ESD detector, and enable the second portion of the drive circuit to generate the output signal, in response to the ESD not detected by the ESD detector.
20 . The device of claim 19 , wherein the first portion of the drive circuit includes a plurality of P-type transistors connected in series with each other, and the second portion of the drive circuit includes a plurality of N-type transistors connected in series with each other.