Cross coupled stacked transistors
A semiconductor structure including a first stacked transistor structure adjacent to a second stacked transistor structure, and a first conductive structure in direct contact with and electrically connecting a bottom gate conductor of the first stacked transistor structure and a top gate conductor of the second stacked transistor structure.
1 . A semiconductor structure comprising:
a first stacked transistor structure adjacent to a second stacked transistor structure;
a first conductive structure in direct contact with and electrically connecting a bottom gate conductor of the first stacked transistor structure to a top gate conductor of the second stacked transistor structure;
a second conductive structure above and in direct contact with a bottom gate conductor of the second stacked transistor structure; and
a third conductive structure above and in direct contact with a top gate conductor of the first stacked transistor structure,
wherein the bottom gate conductor of the second stacked transistor structure and the top gate conductor of the first stacked transistor structure are electrically connected via the second conductive structure and the third conductive structure.
2 . The semiconductor structure according to claim 1 , further comprising:
a fourth conductive structure below and in direct contact with the bottom source drain region.
3 . The semiconductor structure according to claim 1 , further comprising:
a top source drain region above and in direct contact with a bottom source drain region, wherein the top source drain region and the bottom source drain region are physically arranged between the first stacked transistor structure and the second stacked transistor structure.
4 . The semiconductor structure according to claim 1 , wherein a width of the top gate conductor of the second stacked transistor structure is greater than a width of a top gate conductor of the first stacked transistor structure.
5 . The semiconductor structure according to claim 1 , wherein a topmost surface of the first conductive structure is substantially flush with both a topmost surface of the bottom gate conductor of the first stacked transistor structure and a topmost surface of the top gate conductor of the second stacked transistor structure.
6 . The semiconductor structure according to claim 1 , wherein the first conductive structure is substantially perpendicular to the top gate conductor of the second stacked transistor structure.
7 . The semiconductor structure according to claim 1 , wherein a topmost surface of the bottom gate conductor of the first stacked transistor structure is substantially flush with a topmost surface of the top gate conductor of the second stacked transistor structure.
8 . A semiconductor structure comprising:
a first stacked transistor structure adjacent to a second stacked transistor structure;
a first electrical connection between a bottom gate conductor of the first stacked transistor structure and a top gate conductor of the second stacked transistor structure; and
a second electrical connection between a top gate conductor of the first stacked transistor structure and a bottom gate conductor of the second stacked transistor structure.
9 . The semiconductor structure according to claim 8 , further comprising:
a top source drain region above and in direct contact with a bottom source drain region, wherein the top source drain region and the bottom source drain region are physically arranged between the first stacked transistor structure and the second stacked transistor structure.
10 . The semiconductor structure according to claim 8 , wherein a width of the top gate conductor of the second stacked transistor structure is greater than a width of a top gate conductor of the first stacked transistor structure.
11 . The semiconductor structure according to claim 8 , wherein a topmost surface of the first electrical connection is substantially flush with both a topmost surface of the bottom gate conductor of the first stacked transistor structure and a topmost surface of the top gate conductor of the second stacked transistor structure.
12 . The semiconductor structure according to claim 8 , wherein the first conductive structure is substantially perpendicular to the top gate conductor of the second stacked transistor structure.
13 . The semiconductor structure according to claim 8 , wherein a topmost surface of the bottom gate conductor of the first stacked transistor structure is substantially flush with a topmost surface of the top gate conductor of the second stacked transistor structure.
14 . A semiconductor structure comprising:
a first stacked transistor structure adjacent to a second stacked transistor structure; and
a first conductive structure in direct contact with and electrically connecting a bottom gate conductor of the first stacked transistor structure and a top gate conductor of the second stacked transistor structure.
15 . The semiconductor structure according to claim 14 , further comprising:
a series of second conductive structures to electrically connect a bottom gate conductor of the first stacked transistor structure and a top gate conductor of the second stacked transistor structure.
16 . The according to claim 14 , further comprising:
a top source drain region above and in direct contact with a bottom source drain region, wherein the top source drain region and the bottom source drain region are physically arranged between the first stacked transistor structure and the second stacked transistor structure.
17 . The semiconductor structure according to claim 14 , wherein a width of the top gate conductor of the second stacked transistor structure is greater than a width of a top gate conductor of the first stacked transistor structure.
18 . The semiconductor structure according to claim 14 , wherein a topmost surface of the first conductive structure is substantially flush with both a topmost surface of the bottom gate conductor of the first stacked transistor structure and a topmost surface of the top gate conductor of the second stacked transistor structure.
19 . The semiconductor structure according to claim 14 , wherein the first conductive structure is substantially perpendicular to the top gate conductor of the second stacked transistor structure.
20 . The semiconductor structure according to claim 14 , wherein a topmost surface of the bottom gate conductor of the first stacked transistor structure is substantially flush with a topmost surface of the top gate conductor of the second stacked transistor structure.