IP Library › Granted Patent US 12,733,293
Granted Patent B2
US 12,733,293 · App. 18/477,480 · Granted Sep 8, 2026

Output circuit for SPAD

Inventors: Tze Ching Fung (Diamond Bar, CA); Yibing Michelle Wang (Temple City, CA); Hongyu Wang (South Pasadena, CA); Eunchul Kang (South Pasadena, CA)
Assignee: Samsung Electronics Co., Ltd.
H10F77/959H10F30/225H10F39/18H10F39/8037H10F39/811
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Quick Facts
Patent No.
US 12,733,293
App. No.
18/477,480
Granted
Sep 8, 2026
Kind
B2
Abstract

An output circuit for a single-photon avalanche diode. In some embodiments, a system includes: a first sensing element; a bus line; a first pull-down circuit; a first pull-up element; and a second pull-up element, the first pull-up element, the second pull-up element, and the first pull-down circuit being connected to the bus line, the first pull-down circuit being connected to the first sensing element and configured to be activated based on a signal from the first sensing element, the first pull-up element having a lower drive strength than the first pull-down circuit.

Claims (45)

1 . A system, comprising:

a first sensing element;

a bus line;

a first pull-down circuit;

a first pull-up element; and

a second pull-up element,

the first pull-up element, the second pull-up element, and the first pull-down circuit being connected to the bus line,

the first pull-down circuit being connected to the first sensing element and configured to be activated based on a signal from the first sensing element,

the first pull-up element having a lower drive strength than the first pull-down circuit.

2 . The system of claim 1 , wherein the first sensing element is a single-photon avalanche diode.

3 . The system of claim 1 , comprising:

a plurality of sensing elements including the first sensing element; and

a plurality of pull-down circuits including the first pull-down circuit,

each of the pull-down circuits being connected to the bus line,

each of the pull-down circuits being connected to, and configured to be activated based on a signal from, a respective sensing element of the plurality of sensing elements,

wherein the sensing elements and the pull-down circuits share the bus line and the first pull-up element.

4 . The system of claim 1 , wherein first the first pull-down circuit comprises a pull-down transistor.

5 . The system of claim 4 , wherein the first pull-down circuit further comprises a row-select transistor.

6 . The system of claim 5 , wherein the row-select transistor is connected between the pull-down transistor and the bus line.

7 . The system of claim 1 , wherein the first pull-up element and the second pull-up element together have a lower drive strength than the first pull-down circuit.

8 . The system of claim 7 , wherein:

the first pull-up element has a drive strength less than one-half of a drive strength of the first pull-down circuit, and

the second pull-up element has a drive strength less than one-half of a drive strength of the first pull-down circuit.

9 . The system of claim 1 , further comprising a buffer amplifier connected to the bus line.

10 . The system of claim 9 , wherein the buffer amplifier is connected to and end of the bus line.

11 . The system of claim 9 , wherein the buffer amplifier comprises a complementary metal oxide semiconductor (CMOS) inverter.

12 . The system of claim 11 , wherein the buffer amplifier comprises three CMOS inverters.

13 . The system of claim 1 , further comprising a bias circuit for applying a bias voltage to the first sensing element, the magnitude of the bias voltage being greater than 2.0 V.

14 . The system of claim 13 , wherein the magnitude of a voltage drop across the first pull-up element, when the bus line is pulled down by the first pull-down circuit, is less than 1.5 V.

15 . The system of claim 1 , wherein the first pull-up element comprises a transistor having a gate connected to a fixed voltage.

16 . The system of claim 1 , comprising:

a plurality of pull-up elements including the first pull-up element and the second pull-up element, and

a processing circuit, configured to turn on or off each of the pull-up elements according to a location of a pixel being read out.

17 . The system of claim 1 , comprising:

a plurality of pull-up elements including the first pull-up element and the second pull-up element; and

a pixel surveying circuit configured to detect faulty pixels, and to turn off the pull-up elements when a faulty pixel is being read out.

18 . A system, comprising:

a means for sensing;

a bus line;

a first pull-down circuit;

a first pull-up element; and

a second pull-up element,

the first pull-up element, the second pull-up element, and the first pull-down circuit being connected to the bus line,

the first pull-down circuit being connected to the means for sensing and configured to be activated based on a signal from the means for sensing,

the first pull-up element having a lower drive strength than the first pull-down circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2024
From: FUNG, TZE CHING; WANG, YIBING MICHELLE; WANG, HONGYU; KANG, EUNCHUL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 067678/0351 →
Continuity (2)
Provisional Application 63454567 · Mar 24, 2023
Related Publication 20240322051A1 · Sep 26, 2024
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