IP Library › Granted Patent US 12,733,363
Granted Patent B2
US 12,733,363 · App. 19/215,548 · Granted Sep 8, 2026

Display panel and electronic device including the same

Inventors: Hyunae Park (Hwaseong-si, KR); Jaewon Kim (Cheongju-si, KR); Seungwoo Sung (Cheonan-si, KR); Jun-yong An (Asan-si, KR); Nuree Um (Hwaseong-si, KR); Ji-eun Lee (Seoul, KR); Yun-kyeong In (Hwaseong-si, KR); Donghyeon Jang (Suwon-si, KR); Seunghan Jo (Seoul, KR); Junyoung Jo (Suwon-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K59/131G09G3/3225G09G3/3266H10K50/841H10K50/86H10K59/1213H10K59/1216H10K59/123H10K59/1315H10K59/40H10K59/88G09G2300/0426G09G2300/08H10D86/441H10D86/481H10D86/60H10K59/65H10K59/871H10K59/8791
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Quick Facts
Patent No.
US 12,733,363
App. No.
19/215,548
Granted
Sep 8, 2026
Kind
B2
Abstract

A display panel including a first panel region (FPR) including (n−1)-th and n-th pixel rows ((n−1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n−1)-th scan line ((n−1)SL) connected to the (n−1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n−1)SL and the nRL.

Claims (45)

1 . An electronic device comprising:

a display panel comprising:

signal lines;

a first pixel;

a second pixel;

a third pixel;

a fourth pixel;

a fifth pixel; and

a sixth pixel,

wherein each of the first to sixth pixels comprises a light-emitting element, a first transistor electrically connected to the light-emitting element, and a second transistor electrically connected to a source or a drain of the first transistor,

wherein a hole penetrates the display panel, the first pixel and the second pixel are disposed with the hole interposed therebetween and arranged in a same pixel row, the third pixel and the fourth pixel are disposed with the hole interposed therebetween and arranged in a same pixel row, and

wherein the signal lines comprise:

a first-first line electrically connected to the second transistor of the first pixel;

a first-second line electrically connected to the second transistor of the second pixel;

a second-first line electrically connected to the second transistor of the third pixel;

a second-second line electrically connected to the second transistor of the fourth pixel;

a first-first data line electrically connected to the fifth pixel;

a first-second data line electrically connected to the sixth pixel; and

a column connection line electrically connected to the first-first data line and the first-second data line,

wherein the first-first line and the first-second line are disposed with the hole interposed therebetween and the second-first line and the second-second line are disposed with the hole interposed therebetween,

the fifth pixel and the sixth pixel are disposed with the hole interposed therebetween and arranged in a same pixel column,

the first-first data line and the first-second data line are disposed with the hole interposed therebetween,

the column connection line is disposed outside the hole,

the column connection line is arranged on a different layer from the first-first data line and the first-second data line,

the column connection line is connected to the first-first data line through at least one first contact hole, and

the column connection line is connected to the first-first data line through at least one second contact hole.

2 . The electronic device of claim 1 , further comprising an electro-optical module configured to transmit or receive an optical signal through the hole.

3 . The electronic device of claim 1 , further comprising an optical film on the display panel.

4 . The electronic device of claim 1 , wherein the first-first line and the first-second line are disposed with the column connection line interposed therebetween.

5 . The electronic device of claim 1 , wherein the column connection line is disposed between the hole and an end of the first-first line or between the hole and an end of the first-second line.

6 . The electronic device of claim 1 , wherein the first-first line and the column connection line are disposed on a same layer.

7 . The electronic device of claim 1 , wherein:

the fifth pixel and the sixth pixel are disposed with the hole interposed therebetween and arranged in a same pixel column;

the signal lines further comprise a data line electrically connected to the fifth pixel and the sixth pixel; and

the first-first line and the first-second line are disposed with the data line interposed therebetween.

8 . The electronic device of claim 1 , wherein each of the first to sixth pixels further comprises a third transistor electrically connected to a gate of the first transistor,

the signal lines further comprises a second-third line electrically connected to the third transistor of the third pixel and first-first line.

9 . The electronic device of claim 1 , wherein the first transistor comprises:

a semiconductor pattern;

a gate overlapping the semiconductor pattern;

the source of the first transistor extended from the semiconductor pattern; and

the drain of the first transistor extended from the semiconductor pattern.

10 . The electronic device of claim 9 , wherein the first-first line and the second-first line are disposed in a same layer as the gate.

11 . The electronic device of claim 1 , wherein the display panel further comprises a first scan driving circuit electrically connected to the first-first line and the second-first line and a second scan driving circuit electrically connected to the first-second line and the second-second line.

12 . The electronic device of claim 11 , wherein the first scan driving circuit and the second scan driving circuit are disposed with the hole interposed therebetween.

Priority Claims (1)
KR 10-2018-0152675 · Nov 30, 2018 · national
Continuity (5)
Continuation 18426231 · Jan 29, 2024
Continuation 17991692 · Nov 21, 2022
Continuation 17465420 · Sep 2, 2021
Continuation 16687917 · Nov 19, 2019
Related Publication 20250287798A1 · Sep 11, 2025
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