IP Library › Granted Patent US 12,733,501
Granted Patent B2
US 12,733,501 · App. 18/111,433 · Granted Sep 8, 2026

Semiconductor device package and method of manufacturing the same

Inventor: Wei-Hao Chang (Kaohsiung, TW)
Assignee: Advanced Semiconductor Engineering, Inc.
H10W42/121H10W70/611H10W70/635H10W70/685H10W74/117H10W90/00H10W90/401
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Quick Facts
Patent No.
US 12,733,501
App. No.
18/111,433
Granted
Sep 8, 2026
Kind
B2
Abstract

A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first carrier, a second carrier disposed over the first carrier, and a reinforcement connected to the second carrier and configured to prevent the second carrier from being recessed toward the first carrier.

Claims (24)

1 . An electronic device, comprising:

a first carrier;

a second carrier disposed over the first carrier; and

a reinforcement connected to the second carrier and configured to prevent the second carrier from being recessed toward the first carrier;

wherein the reinforcement covers a lateral surface of the second carrier

wherein the electronic device further comprises a first encapsulant covering the reinforcement and spaced apart from the lateral surface of the second carrier.

2 . The electronic device of claim 1 , further comprising a first electronic component connected to the first carrier, a second electronic component disposed over the first electronic component and connected to the second carrier and a third electronic component encapsulated by the reinforcement.

3 . The electronic device of claim 1 , wherein a hardness of the first carrier is greater than a hardness of the second carrier.

4 . The electronic device of claim 1 , wherein a thickness of the first carrier is greater than a thickness of the second carrier.

5 . The electronic device of claim 1 , wherein the second carrier comprises a plurality of conductive vias tapered toward the first carrier.

6 . The electronic device of claim 1 , wherein the first encapsulant covers a lateral surface of the first carrier.

7 . The electronic device of claim 6 , further comprising

an electrical connection disposed under the first carrier; and

a second encapsulant encapsulating the electrical connection.

8 . The electronic device of claim 6 , further comprising a fourth electronic component disposed under the first carrier, wherein the first encapsulant is disposed under the first carrier and covers the fourth electronic component.

9 . The electronic device of claim 1 , wherein the second carrier comprises a first dielectric layer and a second dielectric layer, and wherein the first dielectric layer is closer to the first carrier than the second dielectric layer and a thickness of the first dielectric layer is greater than a thickness of the second dielectric layer.

10 . An electronic device, comprising:

a coreless substrate;

at least one electronic component mounted on the coreless substrate;

at least one support element configured to support the coreless substrate;

a reinforcement connected to the coreless substrate and configured to prevent the coreless substrate from collapsing due to a weight of the at least one electronic component; and

a core substrate supporting the support element, wherein the core substrate comprises a first dielectric layer with a first thickness and the coreless substrate comprises a second dielectric layer with a second thickness, and wherein the first thickness is greater than the second thickness.

11 . The electronic device of claim 10 , wherein a width of the core substrate is less than a width of the coreless substrate in a cross-sectional view.

12 . The electronic device of claim 11 , further comprising an encapsulant covering the coreless substrate, at least one electronic component, the reinforcement and the core substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2023
From: CHANG, WEI-HAO
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 063023/0765 →
Continuity (1)
Related Publication 20240282715A1 · Aug 22, 2024
References Cited (30)
US 7687315B2 · Carson · 2010 [cited by applicant]
US 7749807B2 · Karnezos · 2010 [cited by applicant]
US 7977780B2 · Tay et al. · 2011 [cited by applicant]
US 8198735B2 · Chow et al. · 2012 [cited by applicant]
US 8389329B2 · Cho et al. · 2013 [cited by applicant]
US 8541872B2 · Cho et al. · 2013 [cited by applicant]
US 9831148B2 · Yu et al. · 2017 [cited by applicant]
US 10388637B2 · Kim et al. · 2019 [cited by applicant]
US 10510674B2 · Lin et al. · 2019 [cited by applicant]
US 10985760B2 · Lee et al. · 2021 [cited by applicant]
US 11616046B2 · Lin et al. · 2023 [cited by applicant]
US 20060172459A1 · Karnezos · 2006 [cited by examiner]
US 20070257348A1 · Yang · 2007 [cited by applicant]
US 20080157325A1 · Chow et al. · 2008 [cited by applicant]
US 20080211084A1 · Chow et al. · 2008 [cited by applicant]
US 20090102037A1 · Kim · 2009 [cited by applicant]
US 20090166835A1 · Yang et al. · 2009 [cited by applicant]
US 20100320588A1 · Dahilig et al. · 2010 [cited by applicant]
US 20120146242A1 · Fujishima et al. · 2012 [cited by applicant]
US 20130214396A1 · Kim · 2013 [cited by applicant]
US 20140151891A1 · Takano · 2014 [cited by examiner]
US 20160293581A1 · Lin · 2016 [cited by examiner]
US 20170062383A1 · Yu et al. · 2017 [cited by applicant]
US 20190238134A1 · Lee et al. · 2019 [cited by applicant]
US 20200083172A1 · Hsieh et al. · 2020 [cited by applicant]
US 20200402897A1 · Yeh · 2020 [cited by applicant]
Non-Final Office Action for U.S. Appl. No. 17/525,833, issued Oct. 25, 2023, 9 pages. [cited by applicant]
Notice of Allowance for U.S. Appl. No. 17/525,833, issued Feb. 6, 2024, 9 pages. [cited by applicant]
U.S. Appl. No. 17/525,833, filed Nov. 12, 2021, Chang, Wei-Hao. [cited by applicant]
Non-Final Office Action for U.S. Appl. No. 17/525,833, issued Jul. 17, 2023, 8 pages. [cited by applicant]