Bi-directional solid-state DC circuit breaker with breaking speed control
View Patent ↗A bidirectional circuit breaker has Breaking Speed Control (BSC) to prevent false triggering when an upstream fault occurs. A semiconductor switch has a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), an Insulated Gate Bipolar Transistor (IGBT), and a varistor in three parallel branches that drive a positive output. An input capacitor between positive and negative inputs forms an LC network with an inductor connected to the positive input. A current sensor is connected between the inductor and the semiconductor switch. When the current sensor detects reverse current, a snubber switch is closed, connecting a snubber capacitor across both terminals of the inductor. A LCC network is formed that stores more energy than the LC network, spreading out a current spike caused by the upstream fault, reducing peak reverse current pulled through the circuit breaker by the upstream fault. Thus breaking speed is reduced when the snubber switch closes.
1 . A Breaking Speed Control (BSC) circuit breaker comprising:
a power input for connecting to a power source;
an inductor connected to the power input and to an intermediate node;
a current sensor and a semiconductor switch connected in series between the intermediate node and a power output to a load that is protected by the BSC circuit breaker;
a snubber capacitor;
a snubber switch that is controlled by a fourth gate signal;
wherein the snubber switch and the snubber capacitor are connected in series between the power input and the intermediate node; and
a controller that drives the fourth gate signal to close the snubber switch when the current sensor detects a reverse current through the semiconductor switch, the reverse current flowing in a reverse direction from the load to the power input;
wherein the controller drives the fourth gate signal to open the snubber switch and disconnect the snubber capacitor from the inductor when the reverse current is not detected;
wherein breaking speed is reduced by increased input energy absorption of the inductor and snubber capacitor when the snubber switch is closed.
2 . The BSC circuit breaker of claim 1 further comprising:
an input capacitor connected between the power input and a ground input.
3 . The BSC circuit breaker of claim 2 wherein the BSC circuit breaker is a Direct Current (DC) circuit breaker with bidirectional protection;
wherein the power input is connected to a DC trunk that is connected to the power source, the DC trunk having branches to branch loads that are protected by local circuit breakers;
wherein the reverse current is caused by a short in a branch load protected by a local circuit breaker having a current trigger rating that is higher than a current trigger rating of the BSC circuit breaker.
4 . The BSC circuit breaker of claim 3 wherein the semiconductor switch further comprises:
a main branch having a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) having a gate controlled by a third gate signal; and
a bypass branch having a bipolar transistor that is switched on and off by a second gate signal;
wherein the main branch and the bypass branch are connected in parallel with each other.
5 . The BSC circuit breaker of claim 4 wherein the semiconductor switch further comprises:
a passive branch having a passive network of a resistor and a capacitor;
wherein the main branch, the bypass branch, and the passive branch are connected in parallel with each other.
6 . The BSC circuit breaker of claim 4 further comprising:
a relay connected between the ground input from a power supply and a ground output to a load, the relay being an electromechanical relay responsive to a first gate signal.
7 . The BSC circuit breaker of claim 6 further comprising:
gate drivers for generating a start-up sequence and for generating a shut-down sequence that is activated by faults;
wherein the start-up sequence activates the first, second, and third gate signals in that order with a delay between each activation, so that the relay is activated first, then the bipolar transistor after a delay, and then the MOSFET after another delay;
wherein the shut-down sequence deactivates the third, second, and first gate signals in that order with a delay between each deactivation, so that the MOSFET is deactivated first, then the bipolar transistor after a delay, and then the relay after another delay.
8 . The BSC circuit breaker of claim 7 wherein the bipolar transistor is an Insulated Gate Bipolar Transistor (IGBT) having an insulated gate over a base, wherein the insulated gate receives the second gate signal.
9 . A circuit breaker comprising:
an inductor having a first terminal connected to a power input and having a second terminal;
a current sensor;
a semiconductor switch coupled in series with the current sensor and with the inductor to switch current between the power input and a power output;
a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) having a gate controlled by a third gate signal, the MOSFET in a first branch in the semiconductor switch, the MOSFET coupled between an input and an output of the semiconductor switch;
a snubber switch having a gate controlled by a fourth gate signal;
a snubber capacitor connected in series with the snubber switch between the power input and the second terminal of the inductor; and
a controller that drives the fourth gate signal active when the current sensor detects a reverse current flowing in a reverse direction from the power output to the power input;
wherein the snubber switch closes to connect the snubber capacitor across the first terminal and the second terminal of the inductor when the fourth gate signal is activated when reverse current is detected by the current sensor.
10 . The circuit breaker of claim 9 wherein the inductor and the snubber capacitor are connected in parallel and form an LC tank circuit when the snubber switch is closed, the LC tank circuit absorbing energy from the reverse current flowing out of the power input, wherein energy absorbed reduces a peak current measured by the current sensor;
wherein reducing the peak current reduces false triggering when an upstream fault pulls reverse current through the circuit breaker.
11 . The circuit breaker of claim 9 further comprising:
an input capacitor coupled to the power input;
wherein the input capacitor and the inductor form a passive LC network when the snubber switch is open, the passive LC network able to absorb a first amount of energy from a reverse current spike on the power input;
wherein the input capacitor and the inductor and the snubber capacitor form an active LCC network when the snubber switch is closed, the active LCC network able to absorb a second amount of energy from the reverse current spike on the power input;
wherein the second amount of energy is greater than the first amount of energy,
wherein energy absorption from the reverse current spike is increased when the snubber switch is closed.
12 . The circuit breaker of claim 11 wherein the input capacitor is connected between the power input and a ground input.
13 . The circuit breaker of claim 12 further comprising:
a mechanical relay connected between the ground input and a ground output and controlled by a first gate signal.
14 . The circuit breaker of claim 13 further comprising:
an output diode connected between the power output and the ground output.
15 . The circuit breaker of claim 14 further comprising:
an Insulated Gate Bipolar Transistor (IGBT) in series with a resistor in a second branch between the input and the output of the semiconductor switch, the IGBT having a control gate that is controlled by a second gate signal.
16 . The circuit breaker of claim 15 further comprising:
a varistor coupled between the input and the output of the semiconductor switch in a third branch.
17 . The circuit breaker of claim 16 wherein the controller drives the fourth gate signal active when the current sensor detects the reverse current flowing in the reverse direction from the power output to the power input and the reverse current is greater than a nominal current value;
wherein the fourth gate signal is not activated for near-zero current values.
18 . The circuit breaker of claim 17 wherein when the reverse current exceeds a short-circuit threshold, the controller drives the third gate signal to an inactive state to disable the MOSFET, then the controller waits for a period of time before driving the second gate signal to an inactive state to disable the IGBT.
19 . A circuit breaker with upstream fault tolerance comprising:
a power input to an upstream power source and to upstream loads;
an inductor connected between the power input and a first node;
a current sensor connected between the first node and a second node;
a semiconductor switch connected between the second node and a power output to a load, the semiconductor switch having a transistor controlled by a main gate signal;
an input capacitor connected between the power input and a ground input;
a snubber capacitor connected between the power input and a snubber node;
a snubber switch connected between the snubber node and the first node; the snubber switch controlled by a snubber gate signal;
a snubber controller that drives the snubber gate signal to an active state that closes the snubber switch when the current sensor detects a reverse current flowing from the second node to the first node, the snubber controller driving the snubber gate signal to an inactive state when the current sensor detects a forward current flowing from the first node to the second node; and
a main controller that drives the main gate signal to an inactive state that turns off the transistor to disconnect the second node from the power output when the current sensor detects a current that exceeds a trigger current.
20 . The circuit breaker of claim 19 further comprising:
a mechanical relay connected between the ground input and a ground output and controlled by a first gate signal from the main controller.