Semiconductor devices methods of manufacturing semiconductor devices
View Patent ↗In one example, an electronic device comprises a first and second substrates comprising first and second dielectric structures and first and second conductive structures, a first electronic component over the first substrate, the second substrate being over the first substrate and the first electronic component, a first interconnect structure between the first substrate and the second substrate and coupled with the first conductive structure and the second conductive structure, a first encapsulant between the first substrate and the second substrate and covering a lateral side of the first interconnect structure and a lateral side of the first electronic component, a second interconnect structure over the second substrate and coupled with the second conductive structure, a second encapsulant over the second substrate and covering a lateral side of the second interconnect structure, and a photonic integrated circuit over the second encapsulant and coupled with the second interconnect structure.
1 . An electronic device, comprising:
a first substrate comprising a first dielectric structure and a first conductive structure;
a first electronic component over the first substrate, wherein the first electronic component is coupled with a top side of the first substrate with a die attach material and the die attach material contacts a majority of a bottom side of the first electronic component;
a second substrate comprising a second dielectric structure and a second conductive structure, wherein the second substrate is over the first substrate and the first electronic component;
a first interconnect structure between the first substrate and the second substrate, wherein the first interconnect structure is coupled with the first conductive structure and the second conductive structure;
a first encapsulant between the first substrate and the second substrate and covering a lateral side of the first interconnect structure, a lateral side of the die attach material, and a lateral side of the first electronic component, wherein the first interconnect structure is outside of a central area of the first encapsulant and between the lateral side of the first electronic component and an exterior lateral side of the first encapsulant and wherein the first encapsulant extends between a top side of the first electronic component and the bottom side of the second substrate;
a second interconnect structure over the second substrate and coupled with the second conductive structure;
a second encapsulant over the second substrate and covering a lateral side of the second interconnect structure; and
a second electronic component over the second encapsulant, wherein the second electronic component is coupled with the second interconnect structure, and wherein the second electronic component comprises a photonic integrated circuit (PIC).
2 . The electronic device of claim 1 , wherein:
the second encapsulant is devoid of electronic components.
3 . The electronic device of claim 1 , wherein:
the second electronic component is over a first portion of the second encapsulant, and a second portion of the second encapsulant is uncovered by the second electronic component.
4 . The electronic device of claim 1 , comprising:
a dielectric over the second encapsulant and between the second encapsulant and the second electronic component;
wherein the dielectric covers an entirety of a top side of the second encapsulant.
5 . The electronic device of claim 4 , comprising:
a metallization coupled between a component interconnect of the second electronic component and the second interconnect structure;
wherein the dielectric covers a lateral side of the metallization; and
a portion of the metallization is exposed from the dielectric.
6 . The electronic device of claim 1 , wherein:
the first dielectric structure comprises a single dielectric tier; and
the first conductive structure comprises a single conductive tier in the single dielectric tier, wherein the single conductive tier comprises an outward terminal.
7 . The electronic device of claim 1 , wherein:
the first dielectric structure comprises a plurality of dielectric tiers; and
the first conductive structure comprises a plurality of conductive tiers in the plurality of dielectric tiers.
8 . The electronic device of claim 1 , wherein:
a first portion of the second electronic component extends beyond an exterior lateral side of the second encapsulant; and
the first portion of the second electronic component is non-overlapping with the second encapsulant.
9 . The electronic device of claim 1 , wherein:
the first electronic component comprises a component interconnect coupled with the second conductive structure; and
the first encapsulant is between the first electronic component and the second substrate and covers a lateral side of the component interconnect.
10 . The electronic device of claim 1 , wherein:
at least one of the first substrate or the second substrate comprises a redistribution layer (RDL) substrate.
11 . The electronic device of claim 1 , comprising:
a base substrate comprising a base substrate dielectric structure and a base substrate conductive structure;
wherein:
the first substrate and the second substrate are over the base substrate; and
the base substrate conductive structure is coupled with the first conductive structure.
12 . The electronic device of claim 11 , comprising:
a lid over the second electronic component;
wherein the lid is coupled with a top side of the second electronic component and a top side of the base substrate.
13 . The electronic device of claim 12 , wherein:
a first portion of the second electronic component extends beyond an exterior lateral side of the lid;
wherein the first portion of the second electronic component is non-overlapping with the lid.
14 . The electronic device of claim 11 , comprising:
a third electronic component over a top side of the base substrate;
wherein the third electronic component is coupled with the base substrate conductive structure.
15 . The electronic device of claim 11 , wherein:
the base substrate comprises a pre-formed substrate.
16 . A method to manufacture an electronic component, comprising:
providing a first substrate comprising a first dielectric structure and a first conductive structure, wherein the first conductive structure comprises an outward terminal;
providing a first interconnect structure over the first substrate, wherein the first interconnect structure is coupled with the first conductive structure;
providing a first electronic component over the first substrate, wherein the first electronic component is coupled with a top side of the first substrate with a die attach material and the die attach material contacts a majority of a bottom side of the first electronic component;
providing a first encapsulant over the first substrate and covering a lateral side of the first interconnect structure, a lateral side of the die attach material, and a lateral side of the first electronic component;
providing a second substrate comprising a second dielectric structure and a second conductive structure,
wherein the second substrate is over the first substrate and the first electronic component, and the second conductive structure is coupled with the first interconnect structure;
providing a second interconnect structure over the second substrate and coupled with the second conductive structure;
providing a second encapsulant over the second substrate and covering a lateral side of the second interconnect structure; and
providing a second electronic component over the second encapsulant;
wherein the second electronic component is coupled with the second interconnect structure;
wherein the first encapsulant is between the first electronic component and the second substrate; and
wherein the first interconnect structure is outside of a central area of the first encapsulant and between the lateral side of the first electronic component and an exterior lateral side of the first encapsulant and wherein the first encapsulant extends between a top side of the first electronic component and the bottom side of the second substrate.
17 . The method of claim 16 , wherein:
the second electronic component is over a first portion of the second encapsulant, and a second portion of the second encapsulant is uncovered by the second electronic component.
18 . The method of claim 16 , wherein:
a first portion of the second electronic component extends beyond an exterior lateral side of the second encapsulant;
wherein the first portion of the second electronic component is non-overlapping with the second encapsulant.
19 . The method of claim 16 , comprising:
providing a base substrate comprising a base substrate dielectric structure and a base substrate conductive structure, wherein the base substrate conductive structure comprises an inward terminal;
wherein:
the first substrate and the second substrate are over the base substrate; and
the inward terminal of the base substrate conductive structure is coupled with the outward terminal of the first conductive structure.
20 . The method of claim 19 , comprising:
providing a lid over the second electronic component;
wherein the lid is coupled with a top side of the second electronic component and a top side of the base substrate.