IP Library › Granted Patent US 12,740,457
Granted Patent B2
US 12,740,457 · App. 18/542,052 · Granted Sep 15, 2026

Substrate structure including stacked substrates disposed in a shell

Inventors: Yujen Chen (Taichung, TW); Yangyang Sun (San Diego, CA)
Assignee: QUALCOMM INCORPORATED
H10W70/685H10W90/00H10W90/701H10W72/244H10W72/923H10W72/942H10W74/00
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Quick Facts
Patent No.
US 12,740,457
App. No.
18/542,052
Granted
Sep 15, 2026
Kind
B2
Abstract

In an aspect, a substrate structure includes plurality of substrates encapsulated in a shell in a stacked relationship; at least one electronic component in each substrate of the plurality of substrates, wherein the at least one electronic component includes at least a first terminal and a second terminal; a first redistribution layer (RDL) disposed over each substrate of the plurality of substrates configured to electrically couple the first terminal of the at least one electronic component with a respective first terminal disposed over an outer edge of the shell; and a second RDL disposed over each substrate of the plurality of substrates and configured to electrically couple the second terminal of the at least one electronic component with a respective second terminal disposed over the outer edge of the shell.

Claims (61)

1 . A substrate structure, comprising:

plurality of substrates encapsulated in a shell in a stacked relationship along a length of the substrate structure, wherein the shell comprises a molding compound;

at least one electronic component in each substrate of the plurality of substrates, wherein the at least one electronic component includes at least a first terminal and a second terminal;

a first redistribution layer (RDL) disposed over each substrate of the plurality of substrates, the first RDL extending along a height of the substrate structure and configured to electrically couple the first terminal of the at least one electronic component with a respective first terminal disposed over an outer edge of the shell, wherein the outer edge of the shell extends along the length of the substrate structure; and

a second RDL disposed over each substrate of the plurality of substrates, the second RDL extending along the height of the substrate structure and configured to electrically couple the second terminal of the at least one electronic component with a respective second terminal disposed over the outer edge of the shell.

2 . The substrate structure of claim 1 , wherein the at least one electronic component in each substrate of the plurality of substrates comprises:

a plurality of passive components.

3 . The substrate structure of claim 1 , wherein the at least one electronic component in each substrate of the plurality of substrates comprise:

a plurality of deep trench capacitors.

4 . The substrate structure of claim 1 , wherein:

the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell are configured to electrically couple the substrate structure with an interconnect structure.

5 . The substrate structure of claim 1 , further comprising:

a metallization structure disposed at the outer edge of the shell, wherein the metallization structure is configured to electrically couple the first RDL disposed over each substrate of the plurality of substrates with the respective first terminal disposed over the outer edge of the shell.

6 . The substrate structure of claim 5 , wherein:

the metallization structure disposed over the outer edge of the shell is configured to electrically couple the second RDL disposed over each substrate of the plurality of substrates with the respective second terminal disposed over the outer edge of the shell.

7 . The substrate structure of claim 1 , further comprising:

a first dielectric layer disposed over a first side of each substrate of the plurality of substrates and between a first side of the substrate and the first RDL; and

a second dielectric layer disposed over the first side of each substrate of the plurality of substrates between the first RDL and the second RDL.

8 . The substrate structure of claim 7 , further comprising:

a third dielectric layer disposed over the second RDL of each substrate of the plurality of substrates.

9 . The substrate structure of claim 8 , wherein:

the third dielectric layer associated with at least one substrate of the plurality of substrates separates the at least one substrate from an adjacent substrate encapsulated in the shell.

10 . An electronic device, comprising:

a substrate structure comprising:

plurality of substrates encapsulated in a shell in a stacked relationship along a length of the substrate structure, wherein the shell comprises a molding compound;

at least one electronic component in each substrate of the plurality of substrates, wherein the at least one electronic component includes at least a first terminal and a second terminal;

a first redistribution layer (RDL) disposed over each substrate of the plurality of substrates, the first RDL extending along a height of the substrate structure and configured to electrically couple the first terminal of the at least one electronic component with a respective first terminal disposed over an outer edge of the shell, wherein the outer edge of the shell extends along the length of the substrate structure; and

a second RDL disposed over each substrate of the plurality of substrates, the second RDL extending along the height of the substrate structure and configured to electrically couple the second terminal of the at least one electronic component with a respective second terminal disposed over the outer edge of the shell.

11 . The electronic device of claim 10 , wherein the at least one electronic component in each substrate of the plurality of substrates comprises:

a plurality of passive components.

12 . The electronic device of claim 10 , wherein the at least one electronic component in each substrate of the plurality of substrates comprise:

a plurality of deep trench capacitors.

13 . The electronic device of claim 10 , wherein:

the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell are configured to electrically couple the substrate structure with an interconnect structure.

14 . The electronic device of claim 10 , further comprising:

a metallization structure disposed at the outer edge of the shell, wherein the metallization structure is configured to electrically couple the first RDL disposed over each substrate of the plurality of substrates with the respective first terminal disposed over the outer edge of the shell.

15 . The electronic device of claim 14 , wherein:

the metallization structure disposed over the outer edge of the shell is configured to electrically couple the second RDL disposed over each substrate of the plurality of substrates with the respective second terminal disposed over the outer edge of the shell.

16 . The electronic device of claim 10 , further comprising:

a first dielectric layer disposed over a first side of each substrate of the plurality of substrates and between a first side of the substrate and the first RDL; and

a second dielectric layer disposed over the first side of each substrate of the plurality of substrates between the first RDL and the second RDL.

17 . The electronic device of claim 10 , further comprising:

a third dielectric layer disposed over the second RDL of each substrate of the plurality of substrates.

18 . The electronic device of claim 17 , wherein:

the third dielectric layer associated with at least one substrate of the plurality of substrates separates the at least one substrate from an adjacent substrate encapsulated in the shell.

19 . The electronic device of claim 10 , wherein:

the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell each comprise a terminal configured to electrically couple the substrate structure with an interconnect structure.

20 . The electronic device of claim 10 , wherein the electronic device comprises at least one of:

a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an internet of things (IoT) device, or a device in an automotive vehicle.

21 . A method of fabricating a substrate structure, comprising:

orienting a plurality of substrates for concurrent processing, wherein each substrate of the plurality of substrates includes at least one electronic component, and wherein the at least one electronic component includes at least a first terminal and a second terminal;

forming a first redistribution layer (RDL) over each substrate of the plurality of substrates, wherein the first RDL extends along a height of the substrate structure and is electrically coupled to the first terminal of the at least one electronic component of each substrate of the plurality of substrates;

forming a second RDL over each substrate of the plurality of substrates, wherein the second RDL extends along the height of the substrate structure and is electrically coupled to the second terminal of the at least one electronic component;

encapsulating the plurality of substrates in a stacked relationship in a shell, wherein the shell comprises a molding compound; and

forming a metallization structure over an outer edge of the shell, wherein the outer edge of the shell extends along the length of the substrate structure, and wherein the metallization structure is configured to electrically couple the first RDL of each substrate to a respective first terminal at the outer edge of the shell and for coupling the second RDL of each substrate to a respective second terminal at the outer edge of the shell.

22 . The method of claim 21 , wherein the at least one electronic component formed in each substrate of the plurality of substrates comprises:

a plurality of passive components.

23 . The method of claim 21 , wherein the at least one electronic component formed in each substrate of the plurality of substrates comprise:

a plurality of deep trench capacitors.

24 . The method of claim 21 , comprising:

forming the respective first terminal disposed over the outer edge of the shell and the respective second terminal disposed over the outer edge of the shell for electrically coupling the substrate structure with an interconnect structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2024
From: CHEN, YUJEN; SUN, YANGYANG
To: QUALCOMM INCORPORATED
Reel/Frame 066190/0751 →
Continuity (1)
Related Publication 20250201687A1 · Jun 19, 2025
References Cited (18)
US 6437385B1 · Bertin · 2002 [cited by examiner]
US 6972451B2 · Delpech · 2005 [cited by examiner]
US 7880275B2 · Pagaila · 2011 [cited by examiner]
US 8368201B2 · Tuominen · 2013 [cited by examiner]
US 9018772B2 · Liao · 2015 [cited by examiner]
US 9337073B2 · Liu · 2016 [cited by examiner]
US 9521794B2 · Sibuet · 2016 [cited by examiner]
US 9647057B2 · Voiron · 2017 [cited by examiner]
US 9659878B2 · Chen · 2017 [cited by examiner]
US 10164005B2 · Tsui · 2018 [cited by examiner]
US 11282778B2 · Fang · 2022 [cited by examiner]
US 11769792B2 · Cheng · 2023 [cited by examiner]
US 20090141426A1 · Hwang · 2009 [cited by examiner]
US 20200411481A1 · Yang et al. · 2020 [cited by applicant]
US 20210159182A1 · Jeng et al. · 2021 [cited by applicant]
US 20210305164A1 · Tseng et al. · 2021 [cited by applicant]
JP 2001210646A · 2001 [cited by applicant]
International Search Report and Written Opinion—PCT/US2024/057717—ISA/EPO—Apr. 7, 2025. [cited by applicant]