Systems and methods for exploiting queues and transitional storage for improved low-latency high-bandwidth on-die data retrieval
Apparatuses including general-purpose graphics processing units and graphics multiprocessors that exploit queues or transitional buffers for improved low-latency high-bandwidth on-die data retrieval are disclosed. In one embodiment, a graphics multiprocessor includes at least one compute engine to provide a request, a queue or transitional buffer, and logic coupled to the queue or transitional buffer. The logic is configured to cause a request to be transferred to a queue or transitional buffer for temporary storage without processing the request and to determine whether the queue or transitional buffer has a predetermined amount of storage capacity.
1 . A graphics processor comprising:
a processing resource to provide a request;
a queue or transitional buffer to function as cache memory and to provide on-die or on-chip data retrieval for the graphics processor; and
logic on-die or on chip with the queue or transitional buffer, the logic is configured to cause the request of the processing resource to be transferred to the queue or transitional buffer for temporary storage instead of transferring the request to off-chip memory when the queue or transitional buffer has a predetermined amount of storage capacity, wherein the request is transferred to the queue or transitional buffer without being processed instead of being transferred to the off- chip memory when the queue or the transitional buffer has the predetermined amount of storage capacity that is greater than a threshold level, wherein the logic is further configured to transfer the request to one or more of a different queue, a different transitional buffer, or a next level of memory when the queue or transitional buffer lacks the predetermined amount of storage capacity, wherein the logic is further configured to determine whether the queue or transitional buffer has the predetermined amount of storage capacity including greater than a threshold level of storage capacity.
2 . The graphics processor of claim 1 , wherein the logic comprises a cache controller or memory interface controller, wherein the queue or transitional buffer is located in any location on-die or on chip with the logic and the processing resource, wherein the queue or transitional buffer provides functionality of cache memory.
3 . A method comprising:
causing, by logic associated with processing circuitry of a computing device, a request associated with a processing resource to be transferred to a queue or transitional buffer for temporary storage instead of transferring the request to off-chip memory when the queue or transitional buffer has a predetermined amount of storage capacity, wherein the request is transferred to the queue or transitional buffer without being processed instead of being transferred to the off- chip memory when the queue or the transitional buffer has the predetermined amount of storage capacity that is greater than a threshold level;
transferring the request to one or more of a different queue, a different transitional buffer, or a next level of memory when the queue or transitional buffer lacks the predetermined amount of storage capacity; and
determining whether the queue or transitional buffer has the predetermined amount of storage capacity including greater than a threshold level of storage capacity.
4 . The method of claim 3 , wherein the logic comprises a cache controller or memory interface controller, wherein the queue or transitional buffer is located in any location on-die or on chip with the logic and the processing resource, wherein the queue or transitional buffer provides functionality of cache memory, wherein the processing circuitry comprises graphics processing circuitry.
5 . At least one non-transitory computer-readable medium having stored thereon instructions which, when executed, cause a computing device to perform operations comprising:
causing, by logic associated with processing circuitry of the computing device, a request associated with a processing resource to be transferred to a queue or transitional buffer for temporary storage instead of transferring the request to off-chip memory when the queue or transitional buffer has a predetermined amount of storage capacity, wherein the request is transferred to the queue or transitional buffer without being processed instead of being transferred to the off- chip memory when the queue or the transitional buffer has the predetermined amount of storage capacity that is greater than a threshold level;
transferring the request to one or more of a different queue, a different transitional buffer, or a next level of memory when the queue or transitional buffer lacks the predetermined amount of storage capacity; and
determining whether the queue or transitional buffer has the predetermined amount of storage capacity including greater than a threshold level of storage capacity.
6 . The non-transitory computer-readable medium of claim 5 , wherein the logic comprises a cache controller or memory interface controller, wherein the queue or transitional buffer is located in any location on-die or on chip with the logic and the processing resource, wherein the queue or transitional buffer provides functionality of cache memory, wherein the processing circuitry comprises graphics processing circuitry.