IP Library › Granted Patent US 12,745,019
Granted Patent B2
US 12,745,019 · App. 18/685,633 · Granted Sep 22, 2026

Imaging element and imaging device

Inventors: Hajime Yonemochi (Tokyo, JP); Tomoki Hirata (Tokyo, JP); Shutaro Kato (Kawasaki, JP)
Assignee: NIKON CORPORATION
H04N25/78H04N25/535H04N25/766H04N25/773H04N25/79
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Quick Facts
Patent No.
US 12,745,019
App. No.
18/685,633
Granted
Sep 22, 2026
Kind
B2
Abstract

An imaging element includes a first semiconductor substrate having a pixel unit having disposed therein a plurality of pixels that each include a photoelectric conversion unit configured to convert light to an electric charge, and to output signals based on the electric charge converted by the photoelectric conversion unit and a second semiconductor substrate having an exposure processing unit configured to use the signals read from the pixels to calculate an accumulation time for accumulating the electric charge yielded by the conversion performed by the photoelectric conversion units.

Claims (74)

1 . An imaging element, comprising:

a first semiconductor substrate having a pixel unit the pixel unit including:

a first photoelectric conversion unit configured to convert light to an electric charge;

a second photoelectric conversion unit configured to convert light to an electric charge and disposed alongside the first photoelectric conversion unit in a row direction;

a first transfer unit configured to transfer the electric charge converted by the first photoelectric conversion unit;

a second transfer unit configured to transfer the electric charge converted by the second photoelectric conversion unit;

a first accumulation unit configured to accumulate the electric charge transferred from the first photoelectric conversion unit by the first transfer unit;

a second accumulation unit configured to accumulate the electric charge transferred from the second photoelectric conversion unit by the second transfer unit;

a first output unit including a first selection unit electrically connected to a first signal line, the first output unit being configured to output a first signal based on the electric charge transferred to the first accumulation unit to the first signal line; and

a second output unit including a second selection unit electrically connected to a second signal line, the second output unit being configured to output a second signal based on the electric charge transferred to the second accumulation unit to the second signal line; and

a second semiconductor substrate stacked with the first semiconductor substrate, the second semiconductor substrate having:

a first exposure processing unit configured to use the first signal to calculate a first evaluation value regarding an accumulation time for accumulating the electric charge converted by the first photoelectric conversion unit;

a second exposure processing unit configured to use the second signal to calculate a second evaluation value regarding an accumulation time for accumulating the electric charge converted by the second photoelectric conversion unit;

a first pixel driving unit configured to output a first transfer control signal for controlling the first transfer unit based on the first evaluation value;

a second pixel driving unit configured to output a second transfer control signal for controlling the second transfer unit based on the second evaluation value; and

a driving unit configured to output a selection control signal for controlling the first selection unit and the second selection unit,

wherein the first transfer unit is electrically connected to a first transfer control line to which the first transfer control signal is output,

wherein the second transfer unit is electrically connected to a second transfer control line to which the second transfer control signal is output, and

wherein the first selection unit and the second selection unit are electrically connected to a selection control line to which the selection control signal is output.

2 . The imaging element according to claim 1 ,

wherein the first exposure processing unit, the second exposure processing unit, the first pixel driving unit, and the second pixel driving unit are provided in a control circuit unit disposed at a position of the second semiconductor substrate opposing the pixel unit, and

wherein the driving unit is disposed outside of the control circuit unit in the second semiconductor substrate.

3 . The imaging element according to claim 2 ,

wherein the pixel unit includes a first pixel block, which includes the first photoelectric conversion unit, the first transfer unit, the first accumulation unit, and the first output unit, and a second pixel block, which includes the second photoelectric conversion unit, the second transfer unit, the second accumulation unit, and the second output unit,

wherein the control circuit unit includes a first control block, which includes the first exposure processing unit and the first pixel driving unit, and a second control block, which includes the second exposure processing unit and the second pixel driving unit,

wherein the first control block is disposed at a position opposing the first pixel block in a stacking direction in which the first semiconductor substrate and the second semiconductor substrate are stacked, and

wherein the second control block is disposed at a position opposing the second pixel block in the stacking direction.

4 . The imaging element according to claim 3 ,

wherein the first control block includes a first exposure control unit configured to output, to the first pixel driving unit, the first transfer control signal generated based on the first evaluation value, and

wherein the second control block includes a second exposure control unit configured to output, to the second pixel driving unit, the second transfer control signal generated based on the second evaluation value.

5 . The imaging element according to claim 4 ,

wherein the first exposure control unit includes a first pixel block control unit configured to generate the first transfer control signal, and a first level shift unit configured to adjust a voltage level of the first transfer control signal generated by the first pixel block control unit, and

wherein the second exposure control unit includes a second pixel block control unit configured to generate the second transfer control signal, and a second level shift unit configured to adjust a voltage level of the second transfer control signal generated by the second pixel block control unit.

6 . The imaging element according to claim 5 ,

wherein the first pixel driving unit is configured to output the first transfer control signal, for which the voltage level was adjusted by the first level shift unit, to the first transfer control line, and

wherein the second pixel driving unit is configured to output the second transfer control signal, for which the voltage level was adjusted by the second level shift unit, to the second transfer control line.

7 . The imaging element according to claim 3 ,

wherein the first control block includes a first signal processing unit configured to perform signal processing on the first signal, and

wherein the second control block includes a second processing unit configured to perform signal processing on the second signal.

8 . The imaging element according to claim 7 ,

wherein the first signal processing unit includes a first conversion unit configured to convert the first signal to a digital signal, and

wherein the second signal processing unit includes a second conversion unit configured to convert the second signal to a digital signal.

9 . The imaging element according to claim 8 ,

wherein the first exposure processing unit is configured to calculate the first evaluation value using upper bits of a first digital signal converted from the first signal by the first conversion unit, and

wherein the second exposure processing unit is configured to calculate the second evaluation value using upper bits of a second digital signal converted from the second signal by the second conversion unit.

10 . The imaging element according to claim 3 ,

wherein the second semiconductor substrate includes a first signal processing unit configured to perform signal processing on the first signal, and a second signal processing unit configured to perform signal processing on the second signal.

11 . The imaging element according to claim 10 ,

wherein the first signal processing unit includes a first conversion unit configured to convert the first signal to a digital signal, and

wherein the second signal processing unit includes a second conversion unit configured to convert the second signal to a digital signal.

12 . The imaging element according to claim 11 ,

wherein the first exposure processing unit is configured to calculate the first evaluation value using upper bits of a first digital signal converted from the first signal by the first conversion unit, and

wherein the second exposure processing unit is configured to calculate the second evaluation value using upper bits of a second digital signal converted from the second signal by the second conversion unit.

13 . The imaging element according to claim 1 ,

wherein the pixel unit includes a first discharge unit configured to discharge the electric charge of the first photoelectric conversion unit, and a second discharge unit configured to discharge the electric charge of the second photoelectric conversion unit,

wherein the first pixel driving unit is configured to output a first discharge control signal for controlling the first discharge unit based on the first evaluation value, and

wherein the second pixel driving unit is configured to output a second discharge control signal for controlling the second discharge unit based on the second evaluation value.

14 . The imaging element according to claim 13 ,

wherein the first discharge unit is electrically connected to a first discharge control line to which the first discharge control signal is output, and

wherein the second discharge unit is electrically connected to a second discharge control line to which the second discharge control signal is output.

15 . The imaging element according to claim 13 ,

wherein the pixel unit includes a first reset unit configured to reset a potential of the first accumulation unit, and a second reset unit configured to reset a potential of the second accumulation unit, and

wherein the driving unit is configured to output a reset control signal for controlling the first reset unit and the second reset unit.

16 . The imaging element according to claim 15 ,

wherein the first reset unit and the second reset unit are electrically connected to a reset control line to which the reset control signal is output.

17 . The imaging element according to claim 1 ,

wherein the pixel unit includes a first reset unit configured to reset a potential of the first accumulation unit, and a second reset unit configured to reset a potential of the second accumulation unit, and

wherein the driving unit is configured to output a reset control signal for controlling the first reset unit and the second reset unit.

18 . The imaging element according to claim 17 ,

wherein the first reset unit and the second reset unit are electrically connected to a reset control line to which the reset control signal is output.

19 . An imaging device, comprising:

the imaging element according to claim 1 .

20 . The imaging device according to claim 19 , further comprising a lens driving unit configured to drive a lens unit that emits light to the imaging element.

21 . The imaging device according to claim 20 , further comprising the lens unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2024
From: YONEMOCHI, HAJIME; HIRATA, TOMOKI; KATO, SHUTARO
To: NIKON CORPORATION
Reel/Frame 067478/0093 →
Priority Claims (1)
JP 2021-137343 · Aug 25, 2021 · national
Continuity (1)
Related Publication 20240381005A1 · Nov 14, 2024
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