Semiconductor device
View Patent ↗According to one embodiment, a semiconductor device includes: a first substrate; a first transistor provided on the first substrate; a light receiving element; and a light emitting element provided on the light receiving element, wherein the first substrate, the first transistor, the light emitting element, and the light receiving element are disposed sequentially in a first direction.
1 . A semiconductor device comprising:
a first substrate;
a first transistor provided on the first substrate;
a light receiving element; and
a light emitting element provided on the light receiving element, wherein
the first substrate, the first transistor, the light emitting element, and the light receiving element are disposed sequentially in a first direction.
2 . The semiconductor device according to claim 1 , further comprising:
a second substrate provided between the first substrate and the first transistor, and the light receiving element and the light emitting element.
3 . The semiconductor device according to claim 2 , further comprising:
a first interconnect configured to electrically couple a gate of the first transistor and a first electrode of the light receiving element; and
a second interconnect configured to electrically couple a source of the first transistor and a second electrode of the light receiving element, wherein
the first interconnect and the second interconnect are provided on the surface and inside of the second substrate so as to pass through the second substrate in the first direction.
4 . The semiconductor device according to claim 3 , wherein
the first electrode and the second electrode of the light receiving element are bump electrodes.
5 . The semiconductor device according to claim 2 , further comprising:
an input terminal; and
a third interconnect configured to electrically couple the input terminal and a third electrode of the light emitting element, wherein
the third interconnect includes a first portion provided on the surface and inside of the second substrate.
6 . The semiconductor device according to claim 5 , wherein
the third interconnect further includes a second portion provided on the surface and inside of the first substrate,
the first portion of the third interconnect is provided so as to pass through the second substrate in the first direction,
the second portion of the third interconnect is provided so as to pass through the first substrate in the first direction, and
the input terminal is provided on the first substrate.
7 . The semiconductor device according to claim 5 , wherein
the input terminal is disposed side by side with each of the first substrate, the second substrate, the first transistor, the light receiving element, and the light emitting element in a second direction intersecting the first direction, and is disposed so as to intersect the first substrate and the second substrate.
8 . The semiconductor device according to claim 7 , wherein
the input terminal is in contact with a side surface of the second substrate, and
the first portion of the third interconnect extends in the second direction in the second substrate and is in contact with the input terminal on the side surface of the second substrate.
9 . The semiconductor device according to claim 1 , further comprising:
a first output terminal provided on the first substrate; and
a fourth interconnect configured to electrically couple the first output terminal and a drain of the first transistor, wherein
the fourth interconnect is provided on the surface and inside of the first substrate so as to pass through the first substrate in the first direction.
10 . The semiconductor device according to claim 1 , wherein
the first transistor is provided at a position intersecting the first substrate in a second direction intersecting the first direction.
11 . The semiconductor device according to claim 2 , wherein
the light emitting element is provided at a position intersecting the second substrate in a second direction intersecting the first direction.
12 . The semiconductor device according to claim 1 , further comprising:
a second transistor provided on the first substrate, wherein
the first substrate, the second transistor, the light emitting element, and the light receiving element are disposed sequentially in the first direction, and
a source of the first transistor and a source of the second transistor are electrically coupled to each other.
13 . The semiconductor device according to claim 12 , further comprising:
a second substrate provided between the first substrate, the first transistor, and the second transistor and the light receiving element and the light emitting element.
14 . The semiconductor device according to claim 13 , further comprising:
a fifth interconnect configured to electrically couple the source of the first transistor and the source of the second transistor;
a first interconnect configured to electrically couple a gate of the first transistor and a first electrode of the light receiving element;
a sixth interconnect configured to electrically couple a gate of the second transistor and a third electrode of the light receiving element; and
a second interconnect configured to electrically couple the source of the first transistor and the source of the second transistor, and a second electrode of the light receiving element, wherein
the first transistor and the second transistor are provided side by side in a third direction intersecting the first direction,
the fifth interconnect is provided so as to extend in the third direction on a surface of the second substrate, and
the first interconnect, the second interconnect, and the sixth interconnect are provided on the surface and inside of the second substrate so as to pass through the second substrate in the first direction.
15 . The semiconductor device according to claim 14 , wherein
the first electrode, the second electrode, and the third electrode of the light receiving element are bump electrodes.
16 . The semiconductor device according to claim 12 , further comprising:
a first output terminal and a second output terminal provided on the first substrate;
a fourth interconnect configured to electrically couple the first output terminal and a drain of the first transistor; and
a seventh interconnect configured to electrically couple the second output terminal and a drain of the second transistor, wherein
the fourth interconnect and the seventh interconnect are provided on the surface and inside of the first substrate so as to pass through the first substrate in the first direction.
17 . The semiconductor device according to claim 12 , wherein
the first transistor and the second transistor are provided at positions intersecting the first substrate in a second direction intersecting the first direction.