IP Library › Granted Patent US 12,751,257
Granted Patent B2
US 12,751,257 · App. 17/807,324 · Granted Sep 29, 2026

Fin structures

Inventors: Chun-Yang Lu (Taoyuan, TW); Tz-Shian Chen (Taoyuan, TW); Li-Ting Wang (Hsinchu, TW); Huicheng Chang (Tainan, TW); Yee-Chia Yeo (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10P95/90H10D62/117H10P14/6308H10P14/69215
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Quick Facts
Patent No.
US 12,751,257
App. No.
17/807,324
Granted
Sep 29, 2026
Kind
B2
Abstract

Provided is a device including a fin structure and methods for forming such a device. A method includes forming an initial fin having a sidewall. Further, the method includes forming an additional layer of fin material over the sidewall, wherein the additional layer has a thickness. Also, the method includes adjusting the thickness of the additional layer of fin material to form a fin structure with a desired critical dimension.

Claims (48)

1 . A method, comprising:

forming a fin having a sidewall;

forming an additional layer of fin material over the sidewall, wherein the additional layer has an initial thickness greater than a desired thickness;

forming a second layer over the additional layer of fin material, wherein the second layer has a first region with a thinner thickness and a second region with a thicker thickness greater than the thinner thickness; and

reducing the initial thickness of the additional layer of fin material through controlled oxidation comprising thickening the second layer in the first region relative to the second region to reduce a thickness differential of the second layer to form a fin structure with the desired thickness.

2 . The method of claim 1 , wherein:

the fin comprises silicon or comprises a first portion of silicon and a second portion of silicon germanium; and

the additional layer of fin material comprises silicon.

3 . The method of claim 1 , wherein reducing the initial thickness of the additional layer of fin material to form the fin structure with the desired thickness comprises performing a thermal anneal process to reduce the initial thickness of the additional layer of fin material.

4 . The method of claim 3 , wherein:

the fin comprises silicon or comprises a first portion of silicon and a second portion of silicon germanium;

the additional layer of fin material comprises silicon; and

the second layer comprises silicon oxide.

5 . The method of claim 3 , wherein:

the second layer contacts the additional layer of fin material at an interface; and

performing the thermal anneal process comprises consuming silicon at the interface and growing silicon oxide at the interface.

6 . The method of claim 3 , wherein:

the second layer comprises silicon oxide; and

performing the thermal anneal process comprises repairing sub-oxide in the second layer.

7 . The method of claim 3 , wherein:

the second layer comprises silicon oxide; and

performing the thermal anneal process comprises densifying the silicon oxide.

8 . The method of claim 3 , further comprising removing the second layer from an upper portion of the fin structure, wherein the second layer remains laterally adjacent to a lower portion of the fin structure.

9 . The method of claim 3 , further comprising:

determining a desired adjustment to the thickness of the additional layer of fin material; and

performing the thermal anneal process for a duration of time effective to obtain the desired adjustment to the thickness of the additional layer of fin material.

10 . The method of claim 3 , wherein the second layer is formed with different thicknesses at different regions such that the thermal anneal process selectively reduces the thickness of the additional layer of fin material.

11 . A method, comprising:

forming a semiconductor structure having a sidewall;

forming an additional layer of semiconductor material over the sidewall, wherein the additional layer has an initial thickness;

forming a second layer over the additional layer, wherein the second layer has a first region with a thinner thickness and a second region with a thicker thickness greater than the thinner thickness; and

adjusting the initial thickness of the additional layer of semiconductor material to form a combined structure with a desired thickness, wherein adjusting the thickness of the additional layer of semiconductor material comprises:

determining an amount of the additional layer to be consumed; and

performing a controlled oxidation for a duration selected based on the amount of the additional layer to be consumed, wherein performing the controlled oxidation comprises thickening the second layer in the first region relative to the second region to reduce a thickness differential of the second layer.

12 . The method of claim 11 , wherein performing controlled oxidation comprises performing a thermal anneal process with a gas composition including oxygen and nitrogen to oxidize a portion of the additional layer.

13 . The method of claim 11 , further comprising, after adjusting the initial thickness of the additional layer, depositing an insulation material over the combined structure to form a shallow trench isolation feature.

14 . The method of claim 11 , wherein adjusting the initial thickness of the additional layer of semiconductor material comprises performing a thermal anneal process to reduce the thickness of the additional layer via the controlled oxidation.

15 . The method of claim 11 , further comprising, after adjusting the thickness of the additional layer, performing a chemical mechanical planarization process to planarize a top surface of the combined structure.

16 . A method, comprising:

forming a semiconductor device element having a sidewall;

forming an additional layer of material over the element;

forming a second layer over the additional layer, wherein the second layer has a thin portion with a first initial thickness and a thick portion with a second initial thickness greater than the first initial thickness; and

performing a process to reduce a thickness differential between the thin portion and the thick portion, wherein performing the process comprises thickening the thin portion to a first thickness greater than the first initial thickness.

17 . The method of claim 16 , wherein the process further comprises thinning the additional layer of material to a reduced thickness.

18 . The method of claim 16 , wherein:

the semiconductor device element is a semiconductor fin comprising silicon or comprising a first portion of silicon and a second portion of silicon germanium;

the additional layer of material comprises silicon; and

the second layer comprises oxide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2022
From: LU, CHUN-YANG; CHEN, TZ-SHIAN; WANG, LI-TING; CHANG, HUICHENG; YEO, YEE-CHIA
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 060270/0650 →
Continuity (1)
Related Publication 20230411168A1 · Dec 21, 2023
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