Semiconductor device with multi-staged cut side surfaces
A method for manufacturing a semiconductor device which enables favorable back-surface grinding of a semiconductor substrate with preventing a warp in the substrate, thereby manufacturing a thickness-reduced semiconductor device. A projection electrode is formed on a surface of a wafer. A resin layer is formed on the wafer surface to a thickness to bury a top of the projection electrode. A cut groove is formed in the resin layer along a scribe line formed on the wafer. Thereafter, grinding is made on a back surface of the wafer by the use of a grinder or the like. A surface portion of the resin layer is removed by etching or the like, to expose the top of the projection electrode. The wafer is cut along the cut groove to obtain individual semiconductor chip pieces.
1. A semiconductor device, comprising:
a semiconductor substrate;
a resin layer having opposite first and second surfaces, the first surface formed on one surface of the substrate; and
a projection electrode formed on the one surface of the semiconductor substrate, the projection electrode projecting through the resin layer and having a summit exposed from the second surface of the resin layer;
wherein the substrate and the resin layer have, as cut surfaces, side surfaces at least one surface of which is a multi-staged cut surface obtained by cutting twice or more, the multi-staged cut surface including two cut surfaces and a step formed at a boundary between the two cut surfaces, the substrate having an other surface opposite the one surface; and
wherein
the two cut surfaces include a resin layer side surface and a substrate side surface,
the resin layer side surface bounds the resin layer and a first portion of the substrate contacting the resin layer,
the substrate side surface (i) bounds only a second portion of the substrate spaced from the resin layer and (ii) projects outwardly of the resin layer side surface, and
the substrate side surface is closer to the other surface than is the resin layer side surface.
2. The semiconductor device according to claim 1 , wherein the step of the multi-stage cut surface lies in a region of the semiconductor substrate.