Technique to suppress leakage current

1. A method for reducing gate induced drain leakage in a wordline driver, the method comprising:

applying a boosted voltage to an N-well of the wordline driver if the wordline driver is in an operational mode, wherein a charge pump generates the boosted voltage from a power supply voltage; and

applying the power supply voltage to the N-well of the wordline driver if the wordline driver is in a standby mode.

2. The method of claim 1 wherein the wordline driver is a local wordline driver in a segment of a segmented memory array.

3. A method for reducing gate induced drain leakage in a wordline driver, the method comprising:

applying a boosted voltage to an N-well of the wordline driver if the wordline driver is in an operational mode, wherein a charge pump generates the boosted voltage from a power supply voltage; and

applying the power supply voltage to the N-well of the wordline driver if the wordline driver is in a standby mode, wherein the local wordline driver is in the standby mode when the segment is not selected by a main wordline and when the segment of the local wordline driver is selected and the local wordline is not selected.

4. The method of claim 3 , wherein a gate of a PMOS transistor in the N-well of the local wordline driver is connected to the main wordline, wherein a source of the PMOS transistor is connected to a selection line for selecting the local wordline driver, and wherein the drain of the local wordline driver is connected to a local wordline.

5. A method for reducing gate induced drain leakage in a wordline driver, the method comprising:

driving a wordline to a boosted voltage with a driver transistor of the wordline driver if the wordline driver is in an operational mode;

driving the wordline to a downward-driven voltage if the wordline driver is in a standby mode; and

electrically isolating the driver transistor from the downward-driven voltage of the wordline when the wordline driver is in the standby mode.

6. The method of claim 5 wherein the wordline driver is a local word line driver in a segment of a segmented memory array.

7. The method of claim 6 , wherein the local wordline driver is in the standby mode when the segment is not selected by a main wordline and when the segment of the local wordline driver is selected and the local wordline is not selected.

8. The method of claim 5 ,

wherein a charge pump generates the boosted voltage from a power supply voltage;

wherein the boosted voltage is applied to an N-well of the driver transistor when the wordline driver is in the operational mode, and

wherein the power supply voltage is applied to the N-well of the driver transistor when the wordline driver is in the standby mode.

9. The method of claim 5 , wherein electrically isolating the driver transistor from the downward-driven voltage comprises:

floating a drain connection of the driver transistor; and

applying a power supply voltage to a source of the driver transistor, wherein the power supply voltage is used by a charge pump to generate the downward-driven voltage.

10. A wordline driver having a reduced gate induced leaked current during a standby mode comprising:

driver circuitry to drive a wordline to a boosted voltage with an NMOS depletion mode driver transistor if the wordline driver is in an operational mode and to drive the wordline to a downward-driven voltage if the wordline driver is in the standby mode; and

isolation circuitry to electrically isolate the driver transistor from the downward-driven voltage of the wordline when the wordline driver is in the standby mode.

11. The wordline driver of claim 10 , wherein the isolation circuitry comprises a PMOS cut-off transistor, the cut-off transistor configured to electrically isolate the driver transistor from the downward-driven voltage of the wordline when the wordline driver is in the standby mode.

12. The wordline driver of claim 11 , further comprising

a charge pump which generates the boosted voltage from a power supply voltage, wherein the boosted voltage is applied to an N-well of the cut-off transistor when the wordline driver is in the operational mode, and wherein the power supply voltage is applied to the N-well of the cut-off transistor when the wordline driver is in the standby mode.

13. The wordline driver of claim 10 , wherein the wordline driver is a local wordline driver in a segment of a segmented memory array.

14. The wordline driver of claim 13 , further comprising:

an NMOS hold-off transistor configured to apply the downward-driven voltage to a local wordline of the local wordline driver when a local wordline driver select signal deselects the local wordline driver and a main wordline signal selects a main wordline controlling the local wordline driver.

15. A wordline driver having a reduced gate induced leaked current during a standby mode comprising:

a charge pump configured to generate a boosted voltage from a power supply voltage; and

voltage selection circuitry configured to apply the boosted voltage to an N-well of the wordline driver if the wordline driver is in an operational mode and apply the power supply voltage to the N-well of the wordline driver if the wordline driver is in the standby mode.

16. The wordline driver of claim 15 wherein the wordline driver is a local wordline driver in a segment of a segmented memory array.

17. A wordline driver having a reduced gate induced leaked current during a standby mode comprising:

a charge pump configured to generate a boosted voltage from a power supply voltage; and

voltage selection circuitry configured to apply the boosted voltage to an N-well of the wordline driver if the wordline driver is in an operational mode and apply the power supply voltage to the N-well of the wordline driver if the wordline driver is in the standby mode, wherein the wordline driver is a local wordline driver in a segment of a segmented memory array and the local wordline driver is in the standby mode when the segment is not selected by a main wordline and when the segment of the local wordline driver is selected and the local wordline is not selected.

18. A wordline driver having a reduced gate induced leaked current during a standby mode, comprising:

driver circuitry configured to:

drive a wordline to a boosted voltage with a driver transistor of the wordline driver if the wordline driver is in an operational mode; and

drive the wordline to a downward-driven voltage if the wordline driver is in the standby mode; and

electrical isolation circuitry configured to electrically isolate the driver transistor from the downward-driven voltage of the wordline when the wordline driver is in the standby mode.

19. The wordline driver of claim 18 wherein the wordline driver is a local wordline driver in a segment of a segmented memory array.

20. A wordline driver having a reduced gate induced leaked current during a standby mode, comprising:

driver circuitry configured to:

drive a wordline to a boosted voltage with a driver transistor of the wordline driver if the wordline driver is in an operational mode; and

drive the wordline to a downward-driven voltage if the wordline driver is in the standby mode; and

electrical isolation circuitry configured to electrically isolate the driver transistor from the downward-driven voltage of the wordline when the wordline driver is in the standby mode, wherein the wordline driver is a local wordline driver in a segment of a segmented memory array and the local wordline driver is in the standby mode when the segment is not selected by a main wordline and when the segment of the local wordline driver is selected and the local wordline is not selected.

21. The wordline driver of claim 20 , further comprising:

a power supply configured to generate a voltage;

a charge pump configured to generate the boosted voltage from the voltage;

voltage selection circuitry configured to apply the boosted voltage to an N-well of the driver transistor when the wordline driver is in the operational mode and apply the voltage to the N-well of the driver transistor when the wordline driver is in the standby mode.

22. A wordline driver having a reduced gate induced leaked current during a standby mode, comprising:

driver circuitry configured to:

drive a wordline to a boosted voltage with a driver transistor of the wordline driver if the wordline driver is in an operational mode; and

drive the wordline to a downward-driven voltage if the wordline driver is in the standby mode; and

electrical isolation circuitry configured to electrically isolate the driver transistor from the downward-driven voltage of the wordline when the wordline driver is in the standby mode, wherein the electrical isolation circuitry is configured to:

float a drain connection of the driver transistor; and

apply a power supply voltage to a source of the driver transistor, wherein the power supply voltage is used by a charge pump to generate the downward-driven voltage.

23. A wordline driver having a reduced gate induced leaked current during a standby mode comprising:

means for driving a wordline configured to:

drive the wordline to a boosted voltage with a driver transistor of the wordline driver if the wordline driver is in an operational mode; and

drive the wordline to a downward-driven voltage if the wordline driver is in the standby mode; and

means for electrically isolating configured to electrically isolate the driver transistor from the downward-driven voltage of the wordline when the wordline driver is in the standby mode.

24. The wordline driver of claim 23 , further comprising:

means for generating a first voltage;

means for boosting the voltage;

means for selecting a voltage, the means for selecting configured to apply the boosted voltage to an N-well of the driver transistor when the wordline driver is in the operational mode and apply the first voltage to the N-well of the driver transistor when the wordline driver is in the standby mode.

25. The wordline driver of claim 23 , wherein the means for electrically isolating is configured to:

float a drain connection of the driver transistor; and

apply a power supply voltage to a source of the driver transistor, wherein the power supply voltage is used by a charge pump to generate the downward-driven voltage.