IP Library Granted Patent US 7,635,913
Granted Patent B2
US 7,635,913 · App. 11/608,829 · Granted Dec 22, 2009

Stacked integrated circuit package-in-package system

Assignee: Stats Chippac Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,635,913
App. No.
11/608,829
Granted
Dec 22, 2009
Kind
B2
Abstract

A stacked integrated circuit package-in-package system is provided including forming a substrate with a top contact, mounting a first device having a first terminal over the substrate, stacking a second device having a second terminal over the first device in an offset configuration, connecting the first terminal to the top contact below the first terminal, and connecting the second terminal to the top contact below the second terminal.

Claims (80)

1. A stacked integrated circuit package-in-package system comprising:

forming a substrate with a top contact;

mounting a first device having a first die and a first terminal over the substrate, the first terminal has an L-shaped configuration with a first base portion and a first post portion over the base portion;

stacking a second device having a second die and a second terminal over the first device in an offset configuration, the second terminal has an L-shaped configuration with a second base portion and a second post portion over the second base portion;

connecting a first base portion of the first terminal to the top contact below the first terminal;

connecting the second base portion of the second terminal to the top contact below the second terminal;

connecting a first bond wire from the first die to the first base portion of the first terminal; and

connecting a second bond wire from the second die to the second base portion of the second terminal.

2. The system as claimed in claim 1 further comprising forming the first device including forming a device encapsulation with a non-planar side.

3. The system as claimed in claim 1 further comprising forming the first device having a stiffener in a device encapsulation.

4. The system as claimed in claim 1 further comprising:

forming the first device with a first device encapsulation having a first non-planar side; and

forming the second device with a second device encapsulation having a second non-planar side that is complementary to the first non-planar side.

5. The system as claimed in claim 1 further comprising encapsulating the first device and the second device.

6. A stacked integrated circuit package-in-package system comprising:

forming a laminate substrate with a top contact;

mounting a first device having a first die, a first terminal and a first device encapsulation over the substrate, the first terminal has an L-shaped configuration with a first base portion and a first post portion over the first base portion;

stacking a second device having a second die, a second terminal and a second device encapsulation over the first device in an offset configuration, the second terminal has an L-shaped configuration with a second base portion and a second post portion over the second base portion;

connecting the first base portion of the first terminal to the top contact below the first terminal;

connecting the second base portion of the second terminal to the top contact below the second terminal;

connecting a first bond wire from the first die to the first base portion of the first terminal; and

connecting a second bond wire from the second die to the second base portion of the second terminal.

7. The system as claimed in claim 6 further comprising:

forming the first device encapsulation with a first terminal level and a first recess level;

forming the second device encapsulation with a second terminal level and a second recess level;

attaching the first recess level and the second recess level.

8. The system as claimed in claim 6 further comprising attaching an external interconnect to a bottom contact of the substrate.

9. The system as claimed in claim 6 further comprising:

forming the first device having a stiffener; and

connecting the stiffener to a ground connection for providing an electromagnetic shield.

10. The system as claimed in claim 6 further comprising forming the first device includes encapsulating an integrated circuit die.

11. A stacked integrated circuit package-in-package system comprising:

a substrate with a top contact;

a first device having a first die and a first terminal over the substrate, the first terminal has an L-shaped configuration with a first base portion and a first post portion over the first base portion;

a second device having a second die and a second terminal over the first device in an offset configuration, the second terminal has an L-shaped configuration with a second base portion and a second post portion over the second base portion;

a first internal interconnect positioned between the first base portion of the first terminal and the top contact below the first terminal;

a second internal interconnect positioned between the second base portion of the second terminal and the top contact below the second terminal;

a first bond wire connecting the first die to the first base portion of the first terminal; and

a second bond wire connecting the second die to the second base portion of the second terminal.

12. The system as claimed in claim 11 wherein the first device has a device encapsulation with a non-planar side.

13. The system as claimed in claim 11 wherein the first device has a stiffener in a device encapsulation.

14. The system as claimed in claim 11 wherein:

the first device has a first device encapsulation with a first non-planar side; and

the second device has a second device encapsulation with a second non-planar side that is complementary to the first non-planar side.

15. The system as claimed in claim 11 further comprising a package encapsulation to cover the first device and the second device.

16. The system as claimed in claim 11 wherein:

the substrate is a laminate substrate with the top contact;

the first device over the substrate has a first device encapsulation and the first terminal;

the second device over the first device in an offset configuration has a second device encapsulation and the second terminal;

the first internal interconnect is a solder paste between the first terminal and the top contact below the first terminal; and

the second internal interconnect is a solder ball between the second terminal and the top contact below the second terminal.

17. The system as claimed in claim 16 wherein:

the first device encapsulation has a first terminal level and a first recess level; and

the second device encapsulation has a second terminal level and a second recess level with the first recess level and the second recess level.

18. The system as claimed in claim 16 further comprising an external interconnect attached to a bottom contact of the substrate.

19. The system as claimed in claim 16 wherein:

the first device has a stiffener; and

the stiffener is connected to a ground connection for providing an electromagnetic shield.

20. The system as claimed in claim 16 wherein the first device has an integrated circuit die.

21. A stackable integrated circuit package system comprising:

forming a device terminal having an L-shaped configuration with a base portion and a post portion, the post portion positioned over the base portion;

connecting a first bond wire from a first integrated circuit die to the base portion;

stacking a second integrated circuit die over the first integrated circuit die in an offset configuration;

connecting a second bond wire from the second integrated circuit die to the base portion; and

molding a device encapsulation to cover the first integrated circuit die, the second integrated circuit die, and the device terminal with the first integrated circuit die and the base portion partially exposed.

22. The system as claimed in claim 21 further comprising stacking a stiffener over the second integrated circuit die.

23. The system as claimed in claim 21 wherein molding the device encapsulation includes forming a non-planar side of the device encapsulation.

24. The system as claimed in claim 21 wherein connecting the first integrated circuit die and the base portion includes connecting a first active side of the first integrated circuit die.

25. The system as claimed in claim 21 wherein connecting the second integrated circuit die and the base portion includes connecting a second active side of the second integrated circuit die.

26. A stackable integrated circuit package system comprising:

a device terminal having an L-shaped configuration with a base portion and a post portion, the post portion positioned over the base portion;

a first integrated circuit die;

a first interconnect connecting the first integrated circuit die to the base portion;

a second integrated circuit die over the first integrated circuit die in an offset configuration;

a second interconnect connecting the second integrated circuit die to the base portion; and

a device encapsulation to cover the first integrated circuit die, the second integrated circuit die, and the device terminal with the first integrated circuit die and the base portion partially exposed.

27. The system as claimed in claim 26 further comprising a stiffener over the second integrated circuit die.

28. The system as claimed in claim 26 wherein the device encapsulation has a non-planar side.

29. The system as claimed in claim 26 wherein the first interconnect connected to the first integrated circuit die is connected to a first active side of the first integrated circuit die.

30. The system as claimed in claim 26 wherein the second interconnect connected to the second integrated circuit die is connected to a second active side of the second integrated circuit die.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY DATA FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC LTD. AND CORRECT THE NAME OF RECEIVING PARTY DATA FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED AT REEL: 64838 FRAME: 948. ASSIGNOR(S) HEREBY CONFIRMS THE CHAGNE OF NAME. Recorded May 30, 2024
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 067569/0925 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052935/0327 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2006
From: KIM, OHSUG; HA, JONG-WOO; JU, JONG WOOK
To: STATS CHIPPAC LTD.
Reel/Frame 018607/0178 →
Continuity (1)
Related Publication 20080136007A1 · Jun 12, 2008