Semiconductor integrated circuit with flip-flop circuits mounted thereon
A plurality of flip-flop circuits, having different circuit configurations, which perform an identical digital signal processing are mixed on a single semiconductor substrate. A first flip-flop circuit among the plurality of flip-flop circuits receives a clock signal supplied from outside the flip-flop circuits, through at least two stage inverters, and operates with clock signals outputted from the inverters. A second flip-flop circuit receives the clock signal supplied from outside the flip-flop circuits through at least one inverter having a less number of stages than the number of stages of the inverter contained in the first flip-flop circuit, and operates with at least one of the clock signal and a clock signal outputted from the inverter.
1. A semiconductor integrated circuit including a first flip-flop circuit and a second flip-flop circuit, having different circuit configurations, which perform an identical digital signal processing, wherein the first and second flip-flop circuits are mixed on a single semiconductor substrate, and wherein,
each of the first and second flip-flop circuits includes a clocked inverter, and wherein
the size of a transistor, included in the clocked inverter of the second flip-flop circuit, in which conduction or nonconduction is controlled by a clock signal is set to be smaller than the size of a transistor, included in the inverter of the first flip-flop circuit, in which conduction or nonconduction is controlled by the clock signal.
2. A semiconductor integrated circuit, according to claim 1 , including a plurality of the second flip-flop circuits,
wherein an external clock signal, supplied externally, with an equal delay time is inputted to each of the plurality of the second flip-flop circuits.
3. A semiconductor integrated circuit according to claim 2 , wherein the external clock signal is supplied via a path wired by a clock tree scheme.