Low noise binary-coded gain amplifier and method for time-gain compensation in medical ultrasound imaging
A low noise variable gain amplifier and method for processing received signals in an ultrasound medical imaging system is disclosed. Unlike solutions known from the prior art, the signals are amplified by a binary-coded gain amplifier having its amplification factor progressively increased during the penetration of the transmitted pulse into a patient's body. This allows enhancing both the system dynamic range and Signal to Noise Ratio.
1. A digitally controllable variable gain amplifier (VGA) comprising:
a differential voltage-mode input terminal for receiving a differential pair of input signals;
a differential N-bit programmable transconductor for receiving said differential pair of input signals and for receiving a N-bit-wide control signal to control the transconductance of said programmable transconductor;
a differential transimpedance amplifier for receiving a differential output signal from said transconductor and for providing a differential output signal in response thereto; and
a look-up-table (LUT) for storing a plurality of control signals and for supplying said plurality of control signals to said transconductor, wherein said control signals increase the gain of said amplifier during the receipt of said input signals.
2. The VGA of claim 1 , wherein said programmable transconductor comprises:
an N-bit-wide control bus and a plurality N of differential voltage-to-current (V-to-I) converters, each for receiving said differential pair of input signals, and for receiving a single-bit control signal for switching the converter ON and OFF, and for providing a differential pair of current outputs.
3. The VGA of claim 2 , further comprising a pair of identical current sources for loading said voltage-to-current converters.
4. The programmable transconductor circuit of claim 2 , wherein each of said V-to-I converters comprises a differential input port, a differential output port, and a control port operative for switching the V-to-I converter ON and OFF, wherein said differential input ports are coupled in pairs to the differential voltage-mode input terminal, said differential output ports are connected together in pairs and arranged to feed said differential transimpedance amplifier; and wherein said control ports are connected to said N-bit-wide control bus on a per-bit basis.
5. The programmable transconductor circuit of claim 2 , wherein the transconductances of said voltage-to-current converters are binary weighted.
6. A digitally controllable variable gain amplifier (VGA) comprising:
a differential voltage-mode input terminal for receiving a differential pair of input signals;
a differential N-bit programmable transconductor for receiving said differential pair of input signals and for receiving a N-bit-wide control signal to control the transconductance of said programmable transconductor; said programmable transconductor comprising an N-bit-wide control bus and a plurality N of differential voltage-to-current (V-to-I) converters, each for receiving said differential pair of input signals, and for receiving a single-bit control signal for switching the converter ON and OFF, and for providing a differential pair of current outputs; wherein each of said V-to-I converters comprises first and second MOS transistors connected to establish a differential transistor pair, first and second constant current sources, and an electronic switch; and wherein:
the first and second transistors having source, gate, and drain nodes, said current sources respectively coupled to the source nodes of said transistors, said switch between the source nodes of said first and second transistors and arranged to be turned on and off in response to the state of a signal inflowing through the control port, said gate nodes respectively coupled to said input port, said drain nodes respectively coupled to said output port;
a differential transimpedance amplifier for receiving a differential output signal from said transconductor and for providing a differential output signal in response thereto; and
a look-up-table (LUT) for storing a plurality of control signals and for supplying said plurality of control signals to said transconductor.
7. A digitally controllable variable gain amplifier (VGA) comprising:
a differential voltage-mode input terminal for receiving a differential pair of input signals;
a differential N-bit programmable transconductor for receiving said differential pair of input signals and for receiving a N-bit-wide control signal to control the transconductance of said programmable transconductor; said programmable transconductor comprising an N-bit-wide control bus and a plurality N of differential voltage-to-current (V-to-I) converters, each for receiving said differential pair of input signals, and for receiving a single-bit control signal for switching the converter ON and OFF, and for providing a differential pair of current outputs; The wherein each of said N differential V-to-I converters comprises two identical T-switches and a differential pair of MOS transistors each having drain, gate, and source nodes, the drain nodes respectively coupled to the output port, the source nodes coupled to a bias current source; and wherein:
said T-switches providing signal paths between said differential input port and the gate nodes, said signal paths are turned on and off in response to the state of a signal inflowing through the said control port;
a differential transimpedance amplifier for receiving a differential output signal from said transconductor and for providing a differential output signal in response thereto; and
a look-up-table (LUT) for storing a plurality of control signals and for supplying said plurality of control signals to said transconductor.
8. A digitally controllable variable gain amplifier (VGA) comprising:
a differential voltage-mode input terminal for receiving a differential pair of input signals;
a differential N-bit programmable transconductor for receiving said differential pair of input signals and for receiving a N-bit-wide control signal to control the transconductance of said programmable transconductor; said programmable transconductor comprising an N-bit-wide control bus and a plurality N of differential voltage-to-current (V-to-I) converters, each for receiving said differential pair of input signals, and for receiving a single-bit control signal for switching the converter ON and OFF, and for providing a differential pair of current outputs; wherein each of said N differential V-to-I converters comprises a differential source-coupled pair of PMOS transistors, first and second differential source-coupled pairs of NMOS transistors, first and second NMOS current mirrors both providing the current mirror ratio of one and having an input and an output, and a common-mode voltage terminal; and wherein:
each of said transistors has drain, gate, and source, the sources of the PMOS transistor pair connected to a bias current source, the drains of the PMOS transistor pair connected to the inputs of the first and second current mirrors while the respective mirrors' outputs coupled to the sources of the first and second NMOS transistor pairs, the drains of the first and second NMOS transistor pairs respectively coupled to the output port, the gates of the first NMOS transistor pair respectively coupled to said input port, the gates of the second NMOS transistor pair connected to the common-mode voltage terminal, the gates of the PMOS transistor pair represent a differential control port operative to turn the V-to-I converter on and off;
a differential transimpedance amplifier for receiving a differential output signal from said transconductor and for providing a differential output signal in response thereto; and
a look-up-table (LUT) for storing a plurality of control signals and for supplying said plurality of control signals to said transconductor.