Chip package with channel stiffener frame
Various semiconductor chip packages and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a substrate that has a first side and a first plurality of passive devices on the first side. A stiffener frame is coupled on the first side. The stiffener frame has first and second spaced apart opposing walls that define a channel in which the first plurality of passive devices is positioned, and a central opening that does not cover a central portion of the first side of the substrate.
1. A method of manufacturing, comprising:
providing a substrate having a first side and a first plurality of passive devices on the first side; and
coupling a stiffener frame on the first side, the stiffener frame having first and second spaced apart opposing walls defining a channel in which the first plurality of passive devices is positioned, and a central opening not covering a central portion of the first side of the substrate; wherein the channel surrounds the central opening.
2. The method of claim 1 , comprising mounting a semiconductor chip on the central portion of the first side of the substrate.
3. The method of claim 1 , comprising forming an insulating layer over the first plurality of passive devices.
4. The method of claim 1 , wherein the coupling a stiffener frame comprises coupling an insulating layer on the first and second spaced apart walls in the channel.
5. The method of claim 1 , wherein the coupling a stiffener frame comprises providing the stiffener frame with a flanged lower surface and securing the flanged lower surface to the first side of the substrate with an adhesive.
6. The method of claim 1 , comprising coupling a plurality of bond pads to a second side of the substrate.
7. The method of claim 1 , comprising coupling a plurality of conductor pins to the second side of the substrate.
8. The method of claim 1 , wherein the providing of the substrate comprises providing a coreless substrate.
9. A method of manufacturing, comprising:
forming a stiffener frame having first and second spaced apart opposing walls coupled to a top portion and defining an open channel, and a central opening;
coupling the stiffener frame to a substrate having a first side and a first plurality of passive devices on the first side, the open channel being positioned over the first plurality of passive devices with the central opening not covering a central portion of the first side of the substrate; wherein the channel surrounds the central opening.
10. The method of claim 9 , wherein the forming a stiffener frame comprises forming the first and second spaced apart walls and the top portion with a U-shaped cross-section.
11. The method of claim 10 , wherein the forming a stiffener frame comprises forming a metal stiffener frame.
12. The method of claim 9 , wherein the forming a stiffener frame comprises forming a first flange at a lower end of the first wall and a second flange at a lower end of the second wall.
13. The method of claim 9 , comprising forming an insulating layer on the first and second spaced apart opposing walls in the open channel.
14. The method of claim 9 , wherein the forming a stiffener frame comprises forming the stiffener as a series of segments each having an open channel.
15. A method of manufacturing, comprising:
providing a substrate having a first side and a first plurality of passive devices on the first side;
coupling a stiffener frame on the first side, the stiffener frame having first and second spaced apart opposing walls defining a channel in which the first plurality of passive devices is positioned, and a central opening not covering a central portion of the first side of the substrate; wherein the channel surrounds the central opening;
mounting a semiconductor chip on the central portion of the first side of the substrate; and
coupling a lid to the stiffener frame to cover the semiconductor chip.
16. The method of claim 15 , comprising forming an insulating layer over the first plurality of passive devices.
17. The method of claim 15 , wherein the coupling a stiffener frame comprises coupling an insulating layer on the first and second spaced apart walls in the channel.
18. The method of claim 15 , wherein the coupling a stiffener frame comprises providing the stiffener frame with a flanged lower surface and securing the flanged lower surface to the first side of the substrate with an adhesive.
19. The method of claim 15 , comprising coupling a plurality of bond pads to a second side of the substrate.
20. The method of claim 15 , comprising coupling a plurality of conductor pins to the second side of the substrate.
21. The method of claim 15 , wherein the providing of the substrate comprises providing a coreless substrate.