Semiconductor device with replacement metal gate and method for selective deposition of material for replacement metal gate

1. A method for fabricating a semiconductor device, comprising:

forming a dummy gate on a substrate having an extremely thin SOI (ETSOI) layer at a surface of the substrate;

forming at least two raised source/drain regions adjacent to the dummy gate;

forming a protective cap on the at least two raised source/drain regions;

removing the dummy gate from the ETSOI;

depositing a gate dielectric layer on the protective cap and on the ETSOI after removing the dummy gate from the ETSOI;

forming a replacement metal gate on the gate dielectric layer to replace the removed dummy gate;

removing the gate dielectric layer from the protective cap; and

removing the protective cap from the at least two raised source/drain regions;

wherein forming the protective cap on the at least two raised source/drain regions comprises selectively depositing a metal layer on the at least two raised source/drain regions; and

wherein forming the dummy gate on the ETSOI comprises,

depositing a dummy SiO 2 layer on the ETSOI,

depositing a dummy polysilicon layer on the dummy SiO 2 layer,

forming a nitride cap on the dummy polysilicon layer, and

forming spacers adjacent a stack defined by the dummy SiO 2 layer, the dummy polysilicon layer, and the nitride cap.

2. The method of claim 1 , wherein the substrate further comprises a buried insulating layer.

3. The method of claim 1 , wherein forming the at least two raised source/drain regions adjacent to the dummy gate comprises epitaxially growing the at least two raised source/drain regions on a respective source region and a respective drain region.

4. The method of claim 1 , further comprising depositing an interlayer dielectric adjacent to the at least two raised source/drain regions.

5. The method of claim 1 , wherein removing the dummy gate from the ETSOI comprises,

using one or more of a dry etch process and a wet etch process with H 3 PO 4 to remove the nitride cap,

using a reactive ion etch process to remove the dummy polysilicon layer, and

using HF to remove the dummy SiO 2 layer;

wherein the protective cap protects the at least two raised source/drain regions from the H 3 PO 4 , if present, and the HF.

6. A method for fabricating a semiconductor device, comprising:

forming a dummy gate on an ETSOI layer of a substrate, the substrate having an SOI layer, a buried oxide layer on the SOI layer, and the ETSOI layer on the buried oxide layer;

epitaxially forming at least two raised source/drain regions adjacent to the dummy gate;

forming a protective cap on the at least two raised source/drain regions;

using an etch process employing at least one acid to remove the dummy gate from the ETSOI layer;

depositing a gate dielectric layer on the protective cap and on the ETSOI layer after removing the dummy gate from the ETSOI layer;

forming a replacement metal gate on the gate dielectric layer to replace the removed dummy gate; and

removing the gate dielectric layer from the protective metal cap and the protective cap from the at least two raised source/drain regions.

7. The method of claim 6 , further comprising depositing an interlayer dielectric adjacent to the at least two raised source/drain regions.

8. The method of claim 6 , wherein forming a protective cap on the at least two raised source/drain regions comprises selectively depositing a metal on the at least two raised source/drain regions by vapor deposition.

9. The method of claim 6 , wherein using an etch process employing at least one acid to remove the dummy gate from the ETSOI layer comprises,

applying one or more of a dry etch process and an H 3 PO 4 wet etch process,

applying a reactive ion etch process, and

applying HF;

wherein the H 3 PO 4 , if present, and the HF are prevented from contacting the at least two raised source/drain regions by the protective cap.