IP Library › Granted Patent US 9,142,673
Granted Patent B2
US 9,142,673 · App. 13/955,861 · Granted Sep 22, 2015

Devices and methods of forming bulk FinFETS with lateral seg for source and drain on dielectrics

Inventors: Jin Ping Liu (Ballston Lake, NY); Min-hwa Chi (Malta, NY)
Assignee: GLOBALFOUNDRIES INC.
H01L29/785H01L29/66795
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Quick Facts
Patent No.
US 9,142,673
App. No.
13/955,861
Granted
Sep 22, 2015
Kind
B2
Abstract

Devices and methods for forming semiconductor devices with FinFETs are provided. One intermediate semiconductor device includes, for instance: a substrate with at least one fin with at least one channel; at least one gate over the channel; at least one hard-mask over the gate; and at least one spacer disposed over the gate and hard-mask. One method includes, for instance: obtaining an intermediate semiconductor device; forming at least one recess into the substrate, the recess including a bottom and at least one sidewall exposing a portion of the at least one fin; depositing a dielectric layer into the at least one recess; removing at least a portion of the dielectric layer to form a barrier dielectric layer; and performing selective epitaxial growth in the at least one recess over the barrier dielectric layer.

Claims (37)

1. A method comprising:

obtaining an intermediate semiconductor device, comprising:

a substrate with at least one fin comprising at least one channel;

at least one gate over the at least one channel;

at least one hard-mask over the at least one gate; and

at least one spacer disposed over the at least one gate and at least one hard-mask;

forming at least one recess into the substrate, wherein the recess comprises a bottom and at least one sidewall exposing a portion of the at least one fin;

depositing a first dielectric layer into the at least one recess;

performing chemical mechanical planarization on the first dielectric layer;

applying a first hard mask layer over the first dielectric layer;

performing a first dry etch over the first hard mask layer to create a first barrier dielectric layer and expose at least a portion of the at least one sidewalls of the at least one fin;

depositing a second dielectric layer over the intermediate semiconductor device;

applying a second hard mask layer over the second dielectric layer;

performing a second dry etch over the second hard mask layer to create a second barrier dielectric layer and expose at least a portion of the at least one sidewalls of the at least one fin; and

performing selective epitaxial growth in the at least one recess over the barrier dielectric layer.

2. The method of claim 1 , wherein the first dielectric layer is a thick dielectric layer.

3. A method comprising:

obtaining an intermediate semiconductor device, comprising:

a substrate with at least one fin comprising at least one channel;

at least one gate over the at least one channel;

at least one hard-mask over the at least one gate;

and at least one spacer disposed over the at least one gate and at least one hard-mask;

forming at least one recess into the substrate, wherein the recess comprises a bottom and at least one sidewall exposing a portion of the at least one fin;

depositing a first dielectric layer into the at least one recess, wherein the first dielectric layer is a thick dielectric layer;

removing at least a portion of the first dielectric layer to form a barrier dielectric layer, comprising:

performing chemical mechanical planarization on the first dielectric layer; and

etching the first dielectric layer to expose at least a portion of the at least one sidewalls of the at least one fin, comprising:

applying a first hard mask layer over the first dielectric layer;

performing a dry etch over the first hard mask layer to create a first barrier dielectric layer;

depositing a second dielectric layer over the intermediate semiconductor device;

applying a second hard mask layer over the first dielectric layer; and

performing a dry etch over the second hard mask layer to create a second barrier dielectric layer;

performing selective epitaxial growth in the at least one recess over the barrier dielectric layer.

4. The method of claim 1 , wherein the first dielectric layer is a thin dielectric layer.

5. The method of claim 4 , further comprising:

performing sputtering on the thin dielectric layer.

6. The method of claim 4 , wherein the thin dielectric layer is approximately 1 nm.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2013
From: LIU, JIN PING; CHI, MIN-HWA
To: GLOBALFOUNDRIES INC.
Reel/Frame 030936/0440 →
Continuity (1)
Related Publication 20150035018A1 · Feb 5, 2015