IP Library Granted Patent US 9,536,815
Granted Patent B2
US 9,536,815 · App. 14/408,338 · Granted Jan 3, 2017

Semiconductor socket with direct selective metalization

Inventor: James Rathburn (Maple Grove, MN)
Assignee: HSIO Technologies, LLC
H01L23/49811H01L21/486H01L21/4857H01L23/49822H01L23/49827H01L23/49838H01L23/49861H01L23/5222H01L23/642H01L23/66H01L24/72H01L25/0657H01L23/50H01L24/16H01L2223/6616H01L2223/6666H01L2223/6677H01L2224/05568H01L2224/05573H01L2224/16225H01L2224/16227H01L2224/81192H01L2224/81385H01L2224/81801H01L2224/81901H01L2225/06517H01L2225/06527H01L2225/06531H01L2225/06572H01L2924/00014H01L2924/12042Y10T29/49204
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Quick Facts
Patent No.
US 9,536,815
App. No.
14/408,338
Granted
Jan 3, 2017
Kind
B2
Abstract

A semiconductor socket including a substrate with a plurality of through holes extending from a first surface to a second surface. A conductive structure is disposed within the through holes A plurality of discrete contact members are located in the plurality of the through holes, within the conductive structure. The plurality of contact members each include a proximal end accessible from the second surface, and a distal end extending above the first surface. The conductive structure can be electrically coupled to circuit geometry. At least one dielectric layer is bonded to the second surface of the substrate with recesses corresponding to desired circuit geometry. A conductive material deposited in at least a portion of the recesses to form conductive traces redistributing terminal pitch of the proximal ends of the contact members.

Claims (16)

1. A semiconductor socket comprising:

a plurality of through holes extending through a substrate from a first surface of the substrate to a second surface of the substrate, each of the plurality of through holes defined by an inner wall of the substrate extending between the first surface and the second surface;

a conductive material deposited around the inner walls of the plurality of holes to create a plurality of conductive structures;

at least one dielectric layer deposited on the inner walls and being bonded to the conductive structures: and

a plurality of discrete contact members disposed in the plurality of the through holes, the plurality of contact members each comprising a proximal end accessible from the second surface, and a distal end extending above the first surface, wherein the conductive structures extend around at least portion of each of the plurality of discrete contact members and the dielectric layer insulating the contact members from the conductive structures.

2. The semiconductor socket of claim 1 , wherein the conductive structures comprise conductive sleeves.

3. The semiconductor socket of claim 1 , wherein the conductive material comprises electro-less plated metal.

4. The semiconductor socket of claim 3 , wherein the conductive structures comprise one of an antennae, and RF connector, or shielding.

5. The semiconductor socket of claim 1 , wherein at least one of the plurality of conductive structures uniformly covers the corresponding inner wall of the substrate between the first surface and the second surface of the substrate.

6. The semiconductor socket of claim 1 , wherein one or more of the conductive structures are electrically coupled to a ground plane.

7. The semiconductor socket of claim 1 , wherein one or more of the conductive structures are electrically coupled to a power plane.

8. The semiconductor socket of claim 1 , wherein one or more of the conductive structures are electrically coupled to one of the plurality of contact member.

9. The semiconductor socket of claim 1 , wherein the substrate comprises a plurality of layers.

10. The semiconductor socket of claim 1 , wherein the substrate comprises a circuitry plane, and wherein the conductive structures are electrically coupled to the circuitry plane.

11. The semiconductor socket of claim 1 , further comprising: conductive traces of a circuit geometry redistributing terminal pitch of the proximal ends of the contact members.

12. The semiconductor socket of claim 11 , further comprising conductive plating on at least a portion of the conductive traces.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2023
From: HSIO TECHNOLOGIES, LLC
To: LCP MEDICAL TECHNOLOGIES, LLC
Reel/Frame 065391/0193 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2014
From: RATHBURN, JAMES
To: HSIO TECHNOLOGIES, LLC
Reel/Frame 034514/0071 →
Continuity (8)
Continuation In Part 13266486
Continuation In Part 13319158
Continuation In Part 13410914 · Mar 2, 2012
Provisional Application 61670765 · Jul 12, 2012
Provisional Application 61181937 · May 28, 2009
Provisional Application 61187873 · Jun 17, 2009
Provisional Application 61448288 · Mar 2, 2011
Related Publication 20150279768A1 · Oct 1, 2015