IP Library › Granted Patent US 9,559,041
Granted Patent B2
US 9,559,041 · App. 14/743,103 · Granted Jan 31, 2017

Semiconductor device and process for fabricating the same

Inventor: Masamichi Ishihara (Fukuoka, JP)
Assignee: LAPIS SEMICONDUCTOR CO., LTD.
H01L23/481H01L23/3157H01L23/488H01L24/13H01L25/04H01L25/0652H01L25/0657H01L23/48H01L2224/05573H01L2224/05624H01L2224/05647H01L2224/05655H01L2224/05666H01L2224/05684H01L2224/13025H01L2224/1403H01L2224/16145H01L2224/16146H01L2224/16148H01L2224/16225H01L2224/17181H01L2224/81191H01L2224/81193H01L2225/06513H01L2225/06541H01L2924/01327H01L2924/10253H01L2924/12044H01L2924/14H01L2924/1461H01L2924/15311H01L2924/3011
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Quick Facts
Patent No.
US 9,559,041
App. No.
14/743,103
Granted
Jan 31, 2017
Kind
B2
Abstract

A thin stacked semiconductor device has a plurality of circuits that are laminated and formed sequentially in a specified pattern to form a multilayer wiring part. At the stage for forming the multilayer wiring part, a filling electrode is formed on the semiconductor substrate such that the surface is covered with an insulating film, a post electrode is formed on specified wiring at the multilayer wiring part, a first insulating layer is formed on one surface of the semiconductor substrate, the surface of the first insulating layer is removed by a specified thickness to expose the post electrode, and the other surface of the semiconductor substrate is ground to expose the filling electrode and to form a through-type electrode. A second insulating layer if formed on one surface of the semiconductor substrate while exposing the forward end of the through-type electrode, and bump electrodes are formed on both electrodes.

Claims (8)

1. A semiconductor device comprising:

a semiconductor substrate having a first main surface, and a second main surface opposing the first main surface, the first main surface comprising a recess portion filled with an oxide film;

a wiring portion over the first main surface of the semiconductor substrate;

a through-type electrode having one end connected to the wiring portion, the through-type electrode penetrating through the oxide film and penetrating through the semiconductor substrate from a bottom surface of the recess portion to the second main surface, the through-type electrode connecting the first main surface and the second main surface of the semiconductor substrate; and

a protruding electrode on the second main surface and connected to another end of the through-type electrode.

2. The semiconductor device according to claim 1 , further comprising a first circuit element at the first main surface of the semiconductor substrate, wherein the wiring portion is connected to the first circuit element.

3. The semiconductor device according to claim 1 , wherein the oxide film is an element isolation oxide film.

4. The semiconductor device according to claim 1 , further comprising an insulating layer that covers the second main surface of the semiconductor substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2022
From: ACHLYS TECHNOLOGIES INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 060244/0398 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2022
From: LAPIS SEMICONDUCTOR CO., LTD.
To: ACHLYS TECHNOLOGIES INC.
Reel/Frame 059559/0280 →
Priority Claims (1)
JP 2003-370651 · Oct 30, 2003 · national
Continuity (4)
Continuation 14157093 · Jan 16, 2014
Continuation 13093220 · Apr 25, 2011
Division 10577863
Related Publication 20150287663A1 · Oct 8, 2015