IP Library › Granted Patent US 9,608,086
Granted Patent B2
US 9,608,086 · App. 14/282,257 · Granted Mar 28, 2017

Metal gate structure and method of formation

Inventors: Andy Chih-Hung Wei (Queensbury, NY); Dae G. Yang (Watervliet, NY); Mariappan Hariharaputhiran (Ballston Lake, NY); Jing Wan (Malta, NY)
Assignee: GLOBAL FOUNDRIES INC.
H01L29/66545H01L29/66H01L29/785
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Quick Facts
Patent No.
US 9,608,086
App. No.
14/282,257
Granted
Mar 28, 2017
Kind
B2
Abstract

Embodiments of the present invention provide a metal gate structure and method of formation. In the replacement metal gate (RMG) process flow, the gate cut process is performed after the metal gate is formed. This allows for a reduced margin between the end of the gate and an adjacent fin. It enables a thinner sacrificial layer on top of the dummy gate, since the gate cut step is deferred. The thinner sacrificial layer improves device quality by reducing the adverse effect of shadowing during implantation. Furthermore, in this process flow, the work function metal layer is terminated along the semiconductor substrate by a capping layer, which reduces undesirable shifts in threshold voltage that occurred in prior methods and structures.

Claims (17)

1. A method of forming a semiconductor structure, comprising:

forming a dummy gate on a semiconductor substrate;

depositing a sacrificial layer on the dummy gate;

forming spacers adjacent to the dummy gate;

removing the dummy gate and sacrificial layer;

depositing a work function metal layer;

depositing a fill metal layer;

performing a gate cut through the fill metal layer and the work function metal layer, whereby an upper surface of the semiconductor substrate is exposed; and

depositing a gate capping layer.

2. The method of claim 1 , wherein depositing a gate capping layer comprises depositing a silicon nitride layer.

3. The method of claim 2 , wherein depositing a gate capping layer is performed using an atomic layer deposition process.

4. The method of claim 1 , wherein depositing a fill metal layer comprises depositing tungsten.

5. The method of claim 1 , wherein depositing a work function metal layer comprises depositing titanium.

6. The method of claim 1 , wherein depositing a work function metal layer comprises depositing aluminum.

7. The method of claim 1 , wherein forming a dummy gate on a semiconductor substrate comprises depositing polysilicon.

8. The method of claim 1 , wherein depositing a sacrificial layer on the dummy gate comprises depositing a silicon nitride layer.

9. The method of claim 8 , wherein depositing a silicon nitride layer comprises depositing a silicon nitride layer having a thickness ranging from about 25 nanometers to about 35 nanometers.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2014
From: WEI, ANDY CHIH-HUNG; YANG, DAE G.; HARIHARAPUTHIRAN, MARIAPPAN; WAN, JING
To: GLOBALFOUNDRIES INC.
Reel/Frame 032931/0053 →
Continuity (1)
Related Publication 20150340461A1 · Nov 26, 2015