IP Library Granted Patent US 9,799,515
Granted Patent B2
US 9,799,515 · App. 15/592,604 · Granted Oct 24, 2017

Silicon carbide semiconductor device and method of manufacturing the same

Inventors: Toru Hiyoshi (Osaka, JP); Takeyoshi Masuda (Osaka, JP); Keiji Wada (Osaka, JP)
Assignee: Sumitomo Electric Industries, Ltd.
H01L21/0475H01L21/046H01L21/049H01L29/045H01L29/1608H01L29/4236H01L29/66068H01L29/7813
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Quick Facts
Patent No.
US 9,799,515
App. No.
15/592,604
Granted
Oct 24, 2017
Kind
B2
Abstract

A silicon carbide semiconductor device includes a silicon carbide layer having a first main surface and a second main surface opposite to the first main surface. In the second main surface of the silicon carbide layer, a trench having a depth in a direction from the second main surface toward the first main surface is provided, and the trench has a sidewall portion where a second layer and a third layer are exposed and a bottom portion, where a first layer is exposed. A position of the bottom portion of the trench in a direction of depth of the trench is located on a side of the second main surface relative to a site located closest to the first main surface in a region where the second layer and the first layer are in contact with each other, or located as deep as the site in the direction of depth.

Claims (15)

1. A method of manufacturing a silicon carbide semiconductor device, comprising the steps of:

preparing a silicon carbide substrate including a first layer having a first conductivity type, a second layer provided in said first layer and having a second conductivity type different from said first conductivity type, and a third layer provided on said second layer as being spaced apart from said first layer and having said first conductivity type;

forming a trench having a sidewall portion reaching said second layer through said third layer and a bottom portion including an exposed surface of said second layer, by removing a part of said third layer and said second layer;

forming an implanted region extending from said bottom portion of said trench to said first layer and having said first conductivity type by implanting an impurity of said first conductivity type into said exposed surface of said second layer, said implanted region being integrated with said first layer;

forming a gate insulating film covering said sidewall portion and said bottom portion of said trench; and

forming a gate electrode on said trench with said gate insulating film being interposed.

2. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein

said step of preparing a silicon carbide substrate includes the step of forming said second layer and said third layer in said first layer through ion implantation.

3. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein

said step of preparing a silicon carbide substrate includes the step of forming said second layer and said third layer on said first layer through epitaxial growth.

4. A method of manufacturing a silicon carbide semiconductor device, comprising the steps of:

preparing a silicon carbide substrate including a first layer having a first conductivity type, two second layers provided at a distance from each other in said first layer and having a second conductivity type different from said first conductivity type, and a third layer provided on said first layer and said second layer and having said first conductivity type;

exposing said first layer by providing an opening in said third layer from above a region between said two second layers and forming a trench having a sidewall portion reaching said second layer through said third layer and a bottom portion including an exposed surface of said first layer;

forming a gate insulating film covering said sidewall portion and said bottom portion of said trench; and

forming a gate electrode on said trench with said gate insulating film being interposed.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Jul 1, 2026
From: SUMITOMO ELECTRIC INDUSTRIES, LTD.
To: MITSUMI ELECTRIC CO., LTD.
Reel/Frame 075871/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2017
From: HIYOSHI, TORU; MASUDA, TAKEYOSHI; WADA, KEIJI
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 042340/0148 →
Priority Claims (1)
JP 2013-155618 · Jul 26, 2013 · national
Continuity (2)
Division 14907023
Related Publication 20170250082A1 · Aug 31, 2017