IP Library Granted Patent US 9,837,484
Granted Patent B2
US 9,837,484 · App. 14/722,872 · Granted Dec 5, 2017

Semiconductor device and method of forming substrate including embedded component with symmetrical structure

Inventors: JinHee Jung (Busan, KR); HyungSang Park (Gyeonggi-do, KR); SungSoo Kim (Seoul, KR)
Assignee: STATS ChipPAC Pte. Ltd.
H01L28/40H01L21/6835H01L23/5389H01L24/19H01L24/25H01L21/486H01L23/49827H01L23/50H01L2221/68345H01L2224/04105H01L2224/2518H01L2224/32225H01L2224/82031H01L2224/82039H01L2224/82047H01L2224/83005H01L2224/92144
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Quick Facts
Patent No.
US 9,837,484
App. No.
14/722,872
Granted
Dec 5, 2017
Kind
B2
Abstract

A semiconductor device comprises a first conductive layer. A second conductive layer is formed over the first conductive layer. A semiconductor component is disposed over the first conductive layer. The second conductive layer lies in a plane between a top surface of the semiconductor component and a bottom surface of the semiconductor component. A third conductive layer is formed over the semiconductor component opposite the first conductive layer. The semiconductor device includes a symmetrical structure. A first insulating layer is formed between the first conductive layer and semiconductor component. A second insulating layer is formed between the semiconductor component and third conductive layer. A height of the first insulating layer between the first conductive layer and semiconductor component is between 90% and 110% of a height of the second insulating layer between the semiconductor component and third conductive layer. The semiconductor component includes a passive device.

Claims (53)

1. A method of making a semiconductor device, comprising:

providing a substrate including a first conductive layer;

forming a first insulating layer over the first conductive layer;

forming a fourth conductive layer over the first insulating layer;

forming a third insulating layer over the first insulating layer and fourth conductive layer;

forming a second conductive layer over the first conductive layer and third insulating layer;

forming an opening through the third insulating layer over the fourth conductive layer;

removing the fourth conductive layer;

disposing a semiconductor component in the opening of the third insulating layer such that the second conductive layer lies in a plane between a top surface of the semiconductor component and a bottom surface of the semiconductor component;

forming a second insulating layer over the semiconductor component; and

forming a third conductive layer over the second insulating layer.

2. The method of claim 1 , wherein the semiconductor component includes a capacitor.

3. The method of claim 1 , further including forming a conductive via through the first insulating layer and third insulating layer by forming a first opening through the first conductive layer, first insulating layer, and third insulating layer to expose the second conductive layer.

4. The method of claim 3 , further including forming a second opening through the second insulating layer to expose the second conductive layer directly opposite the first opening.

5. The method of claim 1 , further including forming a first opening through the first insulating layer to expose a terminal of the semiconductor component.

6. The method of claim 5 , further including forming a second opening through the second insulating layer to expose the terminal of the semiconductor component directly opposite the first opening.

7. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first conductive layer over the substrate;

forming a first insulating layer including an opening through the first insulating layer over the first conductive layer;

forming a second conductive layer over the first insulating layer;

removing the first conductive layer within the opening; and

disposing a semiconductor component over the substrate in the opening of the first insulating layer such that the second conductive layer is approximately centered between a top surface of the semiconductor component and a bottom surface of the semiconductor component.

8. The method of claim 7 , further including forming a second insulating layer over the semiconductor component.

9. The method of claim 8 , wherein the semiconductor device includes a vertically symmetrical structure.

10. The method of claim 8 further including forming a third conductive layer over the second insulating layer opposite the semiconductor component.

11. The method of claim 7 , wherein the second conductive layer lies in a plane that bisects the semiconductor component.

12. The method of claim 7 , wherein the semiconductor component includes a passive device.

13. A method of making a semiconductor device, comprising:

providing a first conductive layer;

forming a first insulating layer over the first conductive layer;

forming a second conductive layer over the first insulating layer;

disposing a semiconductor component over the first conductive layer with the second conductive layer within a height of the semiconductor component;

forming a second insulating layer over the semiconductor component, wherein a height of the first insulating layer between the first conductive layer and semiconductor component is between 90% and 110% of a height of the second insulating layer between the semiconductor component and third conductive layer; and

forming a third conductive layer over the second insulating layer.

14. The method of claim 13 , further including forming the semiconductor device to include a symmetrical structure.

15. The method of claim 13 , wherein disposing a semiconductor component over the first conductive layer includes disposing the semiconductor component with the second conductive layer lying in a plane that bisects the semiconductor component.

16. The method of claim 13 , further including providing the semiconductor component to include a capacitor.

17. The method of claim 13 , further including providing the semiconductor component to include a passive device.

18. The method of claim 13 , further including forming an opening through the first insulating layer or second insulating layer to expose a terminal of the semiconductor component.

19. The method of claim 13 , further including forming an opening through the first insulating layer or second insulating layer to expose the second conductive layer.

20. A method of making a semiconductor device, comprising:

providing a first insulating layer;

forming a first conductive layer over the first insulating layer;

disposing a semiconductor component over the first insulating layer with the first conductive layer approximately centered within a height of the semiconductor component; and

forming a second insulating layer over the semiconductor component, wherein a height of the first insulating layer under a first surface of the semiconductor component is between 90% and 110% of a height of the second insulating layer over a second surface of the semiconductor component opposite the first surface.

21. The method of claim 20 , further including forming the semiconductor device to include a vertically symmetrical structure.

22. The method of claim 20 , further including:

providing a second conductive layer;

disposing the first insulating layer over the second conductive layer; and

forming a third conductive layer over the second insulating layer.

23. The method of claim 20 , wherein disposing the semiconductor component over the first insulating layer includes disposing the semiconductor component over the first insulating layer with the first conductive layer in a plane that bisects the semiconductor component.

24. The method of claim 20 , further including providing the semiconductor component to include a passive device.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CHANGE OF NAME Recorded May 26, 2025
From: STATS CHIPPAC, LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 071372/0142 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2015
From: JUNG, JINHEE; PARK, HYUNGSANG; KIM, SUNGSOO
To: STATS CHIPPAC, LTD.
Reel/Frame 035724/0350 →
Continuity (1)
Related Publication 20160351486A1 · Dec 1, 2016