IP Library Granted Patent US 9,847,413
Granted Patent B2
US 9,847,413 · App. 15/230,307 · Granted Dec 19, 2017

Devices, components and methods combining trench field plates with immobile electrostatic charge

Inventors: Mohamed N. Darwish (Campbell, CA); Jun Zeng (Torrance, CA)
Assignee: MaxPower Semiconductor Inc.
H01L29/7811H01L29/0638H01L29/0649H01L29/0696H01L29/0856H01L29/0882H01L29/1095H01L29/16H01L29/404H01L29/407H01L29/408H01L29/4236H01L29/42376H01L29/7813H01L29/7823H01L29/7827H01L29/7835H03K17/687H01L29/0634H01L29/0692H01L29/0847H01L29/0878H01L29/41766H01L29/42368
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Quick Facts
Patent No.
US 9,847,413
App. No.
15/230,307
Granted
Dec 19, 2017
Kind
B2
Abstract

N-channel power semiconductor devices in which an insulated field plate is coupled to the drift region, and immobile electrostatic charge is also present at the interface between the drift region and the insulation around the field plate. The electrostatic charge permits OFF-state voltage drop to occur near the source region, in addition to the voltage drop which occurs near the drain region (due to the presence of the field plate).

Claims (12)

1. A semiconductor device, comprising:

a current-controlling structure, which injects electrons into a p-type semiconductor drift region under some but not all conditions; said current-controlling structure including an n-type source region, an insulated field-effect transistor gate electrode which is capacitively coupled to selectably invert a portion of a p-type body region to thereby form a horizontal channel therein;

a trench, abutting said drift region, which contains one or more conductive field plates, and which also contains immobile net electrostatic charge in a concentration sufficient to invert portions of said p-type drift region in proximity to said trench; and

an n-type drain region, which is separated from said current-controlling structure by said drift region;

wherein said immobile net electrostatic charge is present in a sufficient quantity that the electric field at breakdown, within the top one-third of the depth over which said field plates collectively extend, is more than half of the electric field in the bottom one-third of the depth over which said field plates collectively extend.

2. The device of claim 1 , further comprising a patterned electrode which is substantially coplanar with the gate electrode but not connected thereto, and which overlies and makes contact with the conductive field plates.

3. The device of claim 1 , wherein said drift region consists essentially of silicon.

4. The device of claim 1 , wherein each said trench includes only one said field plate.

5. The device of claim 1 , comprising a plurality of said trenches.

6. The device of claim 1 , wherein said field plate is heavily doped polysilicon.

7. The device of claim 1 , wherein said field plate is insulated from said drift region by silicon dioxide.

8. The device of claim 1 , wherein said drift region includes paralleled p-type and n-type regions.

Assignments (1)
SECURITY INTEREST Recorded Dec 27, 2022
From: MAXPOWER SEMICONDUCTOR, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 062228/0648 →
Continuity (6)
Continuation 14840744 · Aug 31, 2015
Continuation 13975421 · Aug 26, 2013
Continuation 13004054 · Jan 11, 2011
Provisional Application 61294427 · Jan 12, 2010
Provisional Application 61307007 · Feb 23, 2010
Related Publication 20160343849A1 · Nov 24, 2016