IP Library Granted Patent US 6,927,157
Granted Patent B2
US 6,927,157 · App. 10/637,899 · Granted Aug 9, 2005

Integrated circuit and method for producing a composite comprising a tested integrated circuit and an electrical device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,927,157
App. No.
10/637,899
Granted
Aug 9, 2005
Kind
B2
Abstract

Integrated circuit and method for producing a composite comprising a tested integrated circuit and an electrical device. According to one embodiment, a method is provided for producing a composite comprising a tested integrated circuit and an electrical device. The method can include applying a flexible elevation to a circuit substrate of the integrated circuit. Further, the method can include providing a rewiring device on the circuit substrate. The method can also include carrying out of a test of the integrated circuit with temporary utilization of the contact-making device on the flexible elevation. Further, the method can include applying solder to a contact device of the electrical device. The method can also include placing the tested integrated circuit onto the electrical device. In addition, the method can include reliquifying the solder to form a connection between the intergrated circuit and the electrical device.

Claims (8)

1. Method for producing a composite comprising a tested integrated circuit and an electrical device, having the following steps:

(a) applying a flexible elevation to a circuit substrate of the integrated circuit;

(b) providing a rewiring device on the circuit substrate with the formation of a ring around the flexible elevation and on the flexible elevation with the formation of a contact-making device on the flexible elevation, the ring and the contact-making device being electrically conductively connected to one another;

(c) carrying out of a test of the integrated circuit with temporary utilization of the contact-making device on the flexible elevation;

(c) applying solder to a contact device of the electrical device;

(d) placing the tested integrated circuit or the circuit substrate onto the electrical device with the contact-making device being aligned with the contact device—provided with solder—of the electrical device; and

(e) reliquifying the solder in such a way that it forms a permanent, fixed, electrically conductive connection between the integrated circuit and the electrical device, wherein the solder completely surrounds the flexible elevation upon reliquifaction.

2. Method according to claim 1 , wherein the electrical device is a further tested intergrated circuit and/or a printed circuit board.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT 7105729 PREVIOUSLY RECORDED AT REEL: 036827 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 26, 2017
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 043336/0694 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036827/0885 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023796/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2003
From: HEDLER, HARRY; MEYER, THORSTEN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 014071/0138 →