IP Library Granted Patent US 6,873,022
Granted Patent B2
US 6,873,022 · App. 10/662,810 · Granted Mar 29, 2005

Semiconductor device and method for manufacturing the same

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Quick Facts
Patent No.
US 6,873,022
App. No.
10/662,810
Granted
Mar 29, 2005
Kind
B2
Abstract

In a gate electrode, above a first polycrystalline silicon film, a second polycrystalline silicon film, which has a predetermined silicon crystal face orientation directed with respect to and is smaller in crystal diameter than the first polycrystalline silicon film, is provided, so that even if there locally exist portions which are different in silicidization speed in forming a silicide layer in the second polycrystalline silicon film, the silicidization reaction with unreacted portions of the second polycrystalline silicon film can occur faster than the silicidization reaction with the first polycrystalline silicon film.

Claims (39)

1. A semiconductor device, comprising:

a semiconductor substrate;

a gate insulation film formed on said semiconductor substrate; and

a gate electrode formed on said gate insulation film,

said gate electrode comprising:

a first polycrystalline silicon film formed on said gate insulation film; and

a second polycrystalline silicon film formed above said first polycrystalline silicon film, said second polycrystalline silicon film being in a different crystal state from said first polycrystalline silicon film, and at least an upper layer thereof being silicidized.

2. The semiconductor device according to claim 1 , further comprising:

a separation layer, provided between said first polycrystalline silicon film and said second polycrystalline silicon film, for intercepting silicidization of said first polycrystalline silicon film.

3. The semiconductor device according to claim 1 , wherein said different crystal state denotes varying said second polycrystalline silicon film from said first polycrystalline silicon film in crystal face orientation.

4. The semiconductor device according to claim 2 , wherein said different crystal state denotes varying said second polycrystalline silicon film from said first polycrystalline silicon film in crystal face orientation.

5. The semiconductor device according to claim 3 , wherein a proportion of a silicon crystal face orientation (111) of said second polycrystalline silicon film is greater than that of said first polycrystalline silicon film.

6. The semiconductor device according to claim 4 , wherein a proportion of a silicon crystal face orientation (111) of said second polycrystalline silicon film is greater than that of said first polycrystalline silicon film.

7. The semiconductor device according to claim 1 , wherein said different crystal state denotes varying said second polycrystalline silicon film from said first polycrystalline silicon film in crystal particle diameter.

8. The semiconductor device according to claim 2 , wherein said different crystal state denotes varying said second polycrystalline silicon film from said first polycrystalline silicon film in crystal particle diameter.

9. The semiconductor device according to claim 7 , wherein a crystal particle diameter of said second polycrystalline silicon film is smaller than that of said first polycrystalline silicon film.

10. The semiconductor device according to claim 8 , wherein a crystal particle diameter of said second polycrystalline silicon film is smaller than that of said first polycrystalline silicon film.

11. The semiconductor device according to claim 1 , wherein any one of a cobalt silicide layer, a titanium silicide layer, a nickel silicide layer, and a platinum silicide layer is formed in said second polycrystalline silicon film by said silicidization.

12. The semiconductor device according to claim 2 , wherein any one of a cobalt silicide layer, a titanium silicide layer, a nickel silicide layer, and a platinum silicide layer is formed in said second polycrystalline silicon film by said silicidization.

13. A method for manufacturing a semiconductor device, comprising:

a first step of forming a first polycrystalline silicon film above a semiconductor substrate with a gate insulation film intervening therebetween;

a second step of forming above said first polycrystalline silicon film a second polycrystalline silicon film different in crystal state from said first polycrystalline silicon film; and

a third step of silicidizing at least an upper portion of said second polycrystalline silicon film to form a gate electrode comprising said first polycrystalline silicon film and said silicidized second polycrystalline silicon film.

14. The method for manufacturing a semiconductor device according to claim 13 , further comprising:

after said first step and before said second step, a step of forming on said first polycrystalline silicon film a separation layer for intercepting silicidization of said first polycrystalline silicon film.

15. The method for manufacturing a semiconductor device according to claim 13 , wherein said different crystal state denotes varying said second polycrystalline silicon film from said first polycrystalline silicon film in crystal face orientation.

16. The method for manufacturing a semiconductor device according to claim 14 , wherein said different crystal state denotes varying said second polycrystalline silicon film from said first polycrystalline silicon film in crystal face orientation.

17. The method for manufacturing a semiconductor device according to claim 15 , wherein a proportion of a silicon crystal face orientation (111) of said second polycrystalline silicon film is made greater than that of said first polycrystalline silicon film.

18. The method for manufacturing a semiconductor device according to claim 16 , wherein a proportion of a silicon crystal face orientation (111) of said second polycrystalline silicon film is made greater than that of said first polycrystalline silicon film.

19. The method for manufacturing a semiconductor device according to claim 13 , wherein said different crystal state denotes varying said second polycrystalline silicon film from said first polycrystalline silicon film in crystal particle diameter.

20. The method for manufacturing a semiconductor device according to claim 14 , wherein said different crystal state denotes varying said second polycrystalline silicon film from said first polycrystalline silicon film in crystal particle diameter.

21. The method for manufacturing a semiconductor device according to claim 19 , wherein a crystal particle diameter of said second polycrystalline silicon film is made smaller than that of said first polycrystalline silicon film.

22. The method for manufacturing a semiconductor device according to claim 20 , wherein a crystal particle diameter of said second polycrystalline silicon film is made smaller than that of said first polycrystalline silicon film.

23. The method for manufacturing a semiconductor device according to claim 13 , wherein said second step forms said second polycrystalline silicon film by depositing an amorphous silicon film and thereafter applying a heat treatment to said amorphous silicon film to crystallize said amorphous silicon film.

24. The method for manufacturing a semiconductor device according to claim 14 , wherein said second step forms said second polycrystalline silicon film by depositing an amorphous silicon film and thereafter applying a heat treatment to said amorphous silicon film to crystallize said amorphous silicon film.

25. The method for manufacturing a semiconductor device according to claim 13 , wherein said silicidization is controlled by a film thickness of said second polycrystalline silicon film.

26. The method for manufacturing a semiconductor device according to claim 14 , wherein said silicidization is controlled by a film thickness of said second polycrystalline silicon film.

27. The method for manufacturing a semiconductor device according to claim 13 , wherein any one of a cobalt silicide layer, a titanium silicide layer, a nickel silicide layer, and a platinum silicide layer is formed in said second polycrystalline silicon film by said silicidization.

28. The method for manufacturing a semiconductor device according to claim 14 , wherein any one of a cobalt silicide layer, a titanium silicide layer, a nickel silicide layer, and a platinum silicide layer is formed in said second polycrystalline silicon film by said silicidization.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded Dec 22, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 044949/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 044938/0360 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036036/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
CHANGE OF NAME Recorded Mar 30, 2007
From: FASL LLC
To: SPANSION LLC
Reel/Frame 019084/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2004
From: HAYAKAWA, YUKIO
To: FASL LLC
Reel/Frame 015536/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2003
From: HAYAKAWA, YUKIO
To: FASL LLC
Reel/Frame 014819/0559 →