IP Library Granted Patent US 7,622,789
Granted Patent B2
US 7,622,789 · App. 10/714,536 · Granted Nov 24, 2009

Polymer transistor arrangement, integrated circuit arrangement and method for producing a polymer transistor arrangement

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Quick Facts
Patent No.
US 7,622,789
App. No.
10/714,536
Granted
Nov 24, 2009
Kind
B2
Abstract

The invention relates to a polymer transistor arrangement, an integrated circuit arrangement and a method for producing a polymer transistor arrangement. The polymer transistor arrangement contains a polymer transistor formed in and/or on a substrate. The polymer transistor contains a first source/drain region, a second source/drain region, a channel region between the first and second source/drain regions, a gate region and a gate-insulating layer between channel region and gate region. A drive circuit of the polymer transistor arrangement is set up in such a way that it provides the source/drain regions and the gate region with electrical potentials such that the junction between at least one of the source/drain regions and the channel region can be operated as a diode.

Claims (26)

1. An electrical component, comprising:

a polymer transistor formed in and/or on a substrate including:

a first source/drain region;

a second source/drain region;

a channel region between the first and second source/drain regions;

a gate region; and

a gate-insulating layer between the channel region and a gate region; and

a drive circuit set up to provide the first source/drain region with a voltage of sufficiently large magnitude and the gate region with a drain voltage of a sufficiently small magnitude, such that the polymer transistor has properties similar or identical to those of a Schottky diode.

2. The electrical component as claimed in claim 1 , wherein the drive circuit provides the source/drain regions and the gate region with electrical potentials such that the junction between one of the two source/drain regions and the channel region is connected as a reverse-biased diode.

3. The electrical component as claimed in claim 1 , wherein the channel region and the source/drain regions are produced from a material such that the junction between one of the source/drain regions and the channel region is one of a Schottky junction, an in junction, an ip junction, and a pn junction.

4. The electrical component as claimed in claim 1 , wherein the drive circuit provides electrical potentials such that a magnitude of the gate voltage is greater than a magnitude of the voltage between the source/drain regions.

5. The electrical component as claimed in claim 1 , wherein the junctions between respective ones of the source/drain regions and the channel region are formed geometrically asymmetrically with respect to one another.

6. The electrical component as claimed claim 1 , wherein one of the source/drain regions is formed at least partially on the channel region and the other source/drain region is formed at least partially below the channel region.

7. An integrated circuit arrangement having the electrical component as claimed in claim 1 .

8. The integrated circuit arrangement as claimed in claim 7 , wherein the integrated circuit arrangement is a reference voltage circuit.

9. The integrated circuit arrangement as claimed in claim 7 , wherein the integrated circuit arrangement is a temperature-compensated reference voltage circuit.

10. The integrated circuit arrangement as claimed in claim 7 , wherein the integrated circuit arrangement is a current source.

11. The integrated circuit arrangement as claimed in claim 7 , wherein the integrated circuit arrangement is a voltage control circuit.

12. A method for producing an electrical component, comprising the steps of:

forming a polymer transistor in and/or on a substrate by:

forming a first source/drain region;

forming a second source/drain region;

forming a channel region between the first and second source/drain regions;

forming a gate region; and

forming a gate-insulating layer between the channel region and the gate region; and

setting up a drive circuit to provide the first source/drain region with a voltage of sufficiently large magnitude and the gate region with a drain voltage of a sufficiently small magnitude, such that the polymer transistor has properties similar or identical to those of a Schottky diode.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT 7105729 PREVIOUSLY RECORDED AT REEL: 036827 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 26, 2017
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 043336/0694 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036827/0885 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023796/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2004
From: BREDERLOW, RALF
To: INFINEON TECHNOLOGIES AG
Reel/Frame 014696/0864 →