Method for setting a termination voltage and an input circuit

1. A method for setting a termination voltage of an input circuit of an integrated circuit, comprising:

comparing one or more signal levels of a received signal against one or more assessment potentials;

generating a control signal based on a comparison of the one or more signal levels of the received signal and the one or more assessment potentials; and

setting the termination voltage according to the control signal,

wherein the comparison determines whether a low level potential of the received signal lies below a low potential threshold prescribed by a low assessment potential, and

wherein the termination voltage is decreased by the control signal if the low level potential of the received signal is above the low potential threshold.

2. The method of claim 1 , wherein the termination voltage is set by one of short-circuiting one or more resistors connected in series between a high supply potential and an input terminal and short-circuiting one or more resistors connected in series between the input terminal and a low supply potential.

3. The method of claim 1 , further comprising:

receiving a signal to get the input circuit in an adjustment mode, wherein the method for setting the termination voltage is carried out in the adjustment mode.

4. The method of claim 3 , wherein the one or more assessment potentials comprise one or more low assessment potentials and one or more high assessment potentials.

5. The method of claim 4 , wherein the one or more signal levels of the received signals are compared against the one or more low assessment potentials and the one or more high assessment potentials alternately.

6. The method of claim 1 , wherein the comparison determines whether a high level potential of the received signal lies above a high potential threshold prescribed by a high assessment potential, and wherein the termination voltage is increased by the control signal if the high level potential of the received signal lies below the high potential threshold.

7. A method for setting a termination voltage of an input circuit of an integrated circuit, comprising:

comparing one or more signal levels of a received signal against one or more assessment potentials;

generating a control signal based on a comparison of the one or more signal levels of the received signal and the one or more assessment potentials; and

setting the termination voltage according to the control signal,

wherein the comparison determines whether a high level potential of the received signal lies above a high potential threshold prescribed by a high assessment potential, and

wherein the termination voltage is increased by the control signal if the high level potential of the received signal lies below the high potential threshold.

8. The method of claim 7 , wherein the termination voltage is set by one of short-circuiting one or more resistors connected in series between a high supply potential and an input terminal and short-circuiting one or more resistors connected in series between the input terminal and a low supply potential.

9. The method of claim 7 , further comprising:

receiving a signal to get the input circuit in an adjustment mode, wherein the method for setting the termination voltage is carried out in the adjustment mode.

10. The method of claim 9 , wherein the one or more assessment potentials comprise one or more low assessment potentials and one or more high assessment potentials.

11. The method of claim 10 , wherein the one or more signal levels of the received signals are compared against the one or more low assessment potentials and the one or more high assessment potentials alternately.

12. An input circuit for an integrated circuit, comprising:

an analysis unit connected to receive one or more signal levels of a received signal and to provide a control signal to the control unit, wherein the analysis unit compares the one or more signal levels of a received signal against one or more assessment potentials and generates a control signal based on a comparison of the one or more signal levels of the received signal and the one or more assessment potentials;

a control unit for setting a termination voltage to an input terminal of the input circuit according to the control signal provided from the analysis unit;

a first resistor chain having a first resistor and one or more second resistors; and

a second resistor chain having a third resistor and one or more fourth resistors;

wherein the first and second resistor chains are connected in series between a high supply potential and a low supply potential;

wherein the termination voltage is tapped off between the first and second resistor chains; and

wherein the control unit is configured to short-circuit the one or more second resistors and the one or more fourth resistors according to the control signal to set the termination voltage.

13. The input circuit of claim 12 , further comprising:

one or more first switching devices arranged in parallel with the one or more second resistors respectively; and

one or more second switching devices arranged in parallel with the one or more fourth resistors respectively;

wherein the control unit is configured to selectively switch on and switch off each of the one or more first and second switching devices according to the control signal.

14. The input circuit of claim 12 , wherein the analysis unit is configured to determine whether a low level potential of the received signal lies below a low potential threshold and whether a high level potential of the received signal lies above a high potential threshold.

15. The input circuit of claim 14 , wherein the analysis unit includes a mode signal input for receiving a signal to set the input circuit in an adjustment mode during which the termination voltage is determined.

16. The input circuit claim 12 , further comprising:

an evaluation circuit configured to compare a reference voltage against the received signal with the termination voltage and to provide an output representing logic states based on the comparison.

17. An input circuit for an integrated circuit, comprising:

an analysis means for receiving one or more signal levels of a received signal and for providing a control signal to the control unit, wherein the analysis unit compares the one or more signal levels of a received signal against one or more assessment potentials and generates a control signal based on a comparison of the one or more signal levels of the received signal and the one or more assessment potentials;

a control means for setting a termination voltage to an input terminal of the input circuit according to the control signal provided from the analysis means;

a first resistor means and a second resistor means connected in series between a high supply potential and a low supply potential;

wherein the termination voltage is tapped off between the first and second resistor means; and

wherein the control means is configured to change one or more resistance values of the first and second resistor means according to the control signal to set the termination voltage.

18. The input circuit of claim 17 , wherein the first resistor means comprises a first resistor and one or more second resistors and the second resistor means comprises a third resistor and one or more fourth resistors; and wherein the control means is configured to short-circuit the one or more second resistors and the one or more fourth resistors according to the control signal to set the termination voltage.

19. The input circuit of claim 18 , further comprising:

one or more first switching means arranged in parallel with the one or more second resistors respectively; and

one or more second switching means arranged in parallel with the one or more fourth resistors respectively;

wherein the control means is configured to selectively switch on and switch off each of the one or more first and second switching devices according to the control signal.

20. The input circuit of claim 17 , wherein the analysis means is configured to determine whether a low level potential of the received signal lies below a low potential threshold and whether a high level potential of the received signal lies above a high potential threshold.