IP Library Granted Patent US 7,268,037
Granted Patent B2
US 7,268,037 · App. 11/040,091 · Granted Sep 11, 2007

Method for fabricating microchips using metal oxide masks

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Quick Facts
Patent No.
US 7,268,037
App. No.
11/040,091
Granted
Sep 11, 2007
Kind
B2
Abstract

A process for modifying sections of a semiconductor includes covering the sections to remain free of doping with a metal oxide, e.g., aluminum oxide. Then, the semiconductor is doped, for example, from the gas phase, in those sections that are not covered by the aluminum oxide. Finally, the aluminum oxide is selectively removed again, for example using hot phosphoric acid. Sections of the semiconductor surface which are formed from silicon, silicon oxide or silicon nitride remain in place on the wafer.

Claims (14)

1. A method for fabricating a deep trench capacitor by treating sections of a surface of a trench, comprising:

partially covering the surface of the trench with a metal oxide layer to obtain first sections of the surface, wherein the metal oxide layer comprises at least one metal that is selected from the group consisting of Al, Zr, Hf, Y, Pr, Ta, W, Ru, Ti, La, Nd and Nb;

introducing a dopant into areas of the surface of the trench that are not covered by the metal oxide layer, such that the metal oxide layer acts as a diffusion barrier during doping; and

selectively removing the first sections formed from the metal oxide, after introducing the dopant into the areas that are not covered by the metal oxide layer.

2. The method as claimed in claim 1 , wherein the surface of the trench is formed by an area of a semiconductor substrate.

3. The method as claimed in claim 1 , wherein the dopant is introduced from a gas phase and the surface of the trench is formed by an area of a semiconductor.

4. The method as claimed in claim 1 , wherein the dopant comprises arsenic.

5. The method as claimed in claim 1 , wherein the metal oxide layer includes aluminum oxide.

6. The method as claimed in claim 1 , wherein the semiconductor substrate comprises silicon, an area of which forms a surface of a substrate.

7. The method as claimed in claim 1 , wherein the metal oxide layer is applied to the surface of the trench using an atomic layer deposition process.

8. A method for fabricating a deep trench capacitor by treating sections of a surface of a trench, comprising:

partially covering at least one surface of the trench with a metal oxide layer, wherein the metal oxide layer comprises at least one metal that is selected from the group consisting of Al, Zr, Hf, Y, Pr, Ta, W, Ru, Ti, La, Nd and Nb;

introducing a dopant into areas of the surface of the trench that are not covered by the metal oxide layer, such that the metal oxide layer acts as a diffusion barrier during doping; and

removing the metal oxide layer entirely from the at least one surface of the trench after introduction of the dopant into the areas that are not covered by the metal oxide layer.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT 7105729 PREVIOUSLY RECORDED AT REEL: 036827 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 26, 2017
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 043336/0694 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036827/0885 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023768/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2005
From: JAKSCHIK, STEFAN; HECHT, THOMAS; SCHRODER, UWE; GOLDBACH, MATTHIAS
To: INFINEON TECHNOLOGIES AG
Reel/Frame 016738/0021 →