IP Library Granted Patent US 7,274,110
Granted Patent B2
US 7,274,110 · App. 11/061,762 · Granted Sep 25, 2007

Semiconductor component having a CSP housing

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Quick Facts
Patent No.
US 7,274,110
App. No.
11/061,762
Granted
Sep 25, 2007
Kind
B2
Abstract

The invention relates to a semiconductor component for mounting on a printed circuit board. The semiconductor component includes a housing that at least partially surrounds at least one flat semiconductor chip. Electrical contacts are assigned to the semiconductor chip and serve to establish an electrical connection to electrodes provided on a printed circuit board. The flat semiconductor chip has a mounting lateral surface that includes contact surfaces configured to make contact with the electrical contacts. A buffer layer is located between the housing and the chip, and surrounds the chip up to a supporting surface located on the mounting lateral surface.

Claims (33)

1. Semiconductor component for mounting on a printed circuit board, the semiconductor component having a semiconductor chip formed in planar fashion, the semiconductor chip being assigned electrical contacts by means of which an electrical connection to electrodes or electrode areas provided on the printed circuit board is to be produced, the planar semiconductor chip having a mounting side area, electrical contact area for contact with the electrical contacts being provided on the mounting side area, a supporting area being applied on the mounting side area, the supporting area being significantly smaller than the mounting side area, the semiconductor component having a housing, and the semiconductor component having a buffer layer between the housing and the semiconductor chip characterized in that the housing completely surrounds the semiconductor chip and the buffer layer surrounds the semiconductor chip except for a region around the supporting area.

2. Semiconductor component according to claim 1 , characterized in that the semiconductor chip is mechanically supported on a support base shaped from the housing on the supporting area arranged on the mounting side area.

3. Semiconductor component according to claim 1 , characterized in that the semiconductor chip is mechanically fixedly connected to a support base shaped from the housing on the supporting area arranged on the mounting side area, and the base serves for feeding line feeds from the electrical contacts to the electrical contact areas.

4. Semiconductor component according to claim 1 , characterized in that the supporting area is arranged centrally in the mounting side area.

5. Semiconductor component according to claim 1 characterized in that the supporting area is arranged at the geometric centroid of the mounting side area.

6. Semiconductor component according to claim 1 , characterized in that the semiconductor component is produced in a WLP (“wafer level package”), flip chip or CSP design (“chip scale package”).

7. Semiconductor component according to claim 1 , characterized in that the electrical contacts are formed by bumps.

8. Semiconductor component according to claim 1 , characterized in that the bumps are small solder balls (“solder bumps”).

9. Semiconductor component according to claim 1 characterized in that the bumps are silicone bumps with electrical conducting areas lead over them for contact-making purposes or electrically conductive bumps essentially composed of silicone (“compliant bumps”).

10. Semiconductor component according to claim 1 , characterized in that the diameter G of the buffer layer between the housing of a side area of the semiconductor chip is at least

G

:=

C

·

F

-

α

α

C

G

-

α

α

F

where G is the diameter of the buffer layer between the housing and a side area of the semiconductor chip, C is the length of the solder from the side area to the central point of the semiconductor chip, α C is the thermal expansion coefficient of the semiconductor chip, α G is the thermal expansion coefficient of the buffer layer and α F is the thermal expansion coefficient of the housing.

11. Semiconductor component according to claim 1 , characterized in that the material of the buffer layer is chosen such that the thermal expansion coefficient of the buffer layer is greater than the thermal expansion coefficient of such printed circuit board material on which the semiconductor component is to be fixed.

12. Semiconductor component according to claim 1 , characterized in that the buffer layer is highly elastic.

13. Semiconductor component according to claim 1 , characterized in that the material of the housing is chosen such that the thermal expansion coefficient of the housing is equal to that of such printed circuit board material on which the semiconductor component is to be fixed.

14. Semiconductor component according to claim 1 , characterized in that the material of the housing is chosen such that the thermal expansion coefficient of the housing is greater than that of the semiconductor chip.

15. Semiconductor component according to claim 1 , characterized in that the buffer layer is composed of a polymer, in particular silicone or polyurethane.

16. Semiconductor component according to claim 1 , characterized in that the buffer layer is composed of a foamed material.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT 7105729 PREVIOUSLY RECORDED AT REEL: 036827 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 26, 2017
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 043336/0694 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036827/0885 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023768/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2005
From: HEDLER, HARRY; MEYER, THORSTEN; VASQUEZ, BARBARA
To: INFINEON TECHNOLOGIES AG
Reel/Frame 017096/0028 →