System and method for reducing process-induced charging
A semiconductor device includes a substrate, a memory cell formed on the substrate, and a contact to the substrate. The contact is formed in an area away from the memory cell and functions to raise the potential of the substrate.
1. A method for forming a semiconductor device including a substrate, comprising:
forming a structure on the substrate;
forming a source region;
forming a drain region; and
forming a first conductive layer to the substrate, the first conductive layer reducing generation of electron-hole pairs in the substrate of the semiconductor device.
2. The method of claim 1 wherein the forming a structure comprises:
forming a first dielectric layer on the substrate,
forming a charge storage layer on the first dielectric layer,
forming a second dielectric layer on the charge storage layer, and
forming a conductive layer on the second dielectric layer.
3. The method of claim 2 further comprising:
forming an interlayer dielectric layer on the semiconductor device after forming the conductive layer.
4. The method of claim 3 wherein the forming a first conductive layer to the substrate comprises:
etching the interlayer dielectric layer to form a trench, and
filling the trench with a second conductive material to form the first conductive layer.
5. The method of claim 1 wherein the forming a first conductive layer includes:
forming the first conductive layer to a width ranging from about 250 Å to about 1000 Å.
6. The method of claim 1 wherein the forming a first conductive layer includes:
forming a hole to the substrate, and
depositing a conductive material in the hole.
7. The method of claim 1 wherein the first conductive layer reduces generation of electron-hole pairs in regions in the substrate adjacent the source region and the drain region during an etching process performed subsequent to forming the first conductive layer.
8. A method for forming a semiconductor device including a substrate, comprising:
forming a structure on the substrate;
forming a source region;
forming a drain region; and
forming a first conductive layer to the substrate, the first conductive layer being formed away from the source region and the drain region.
9. The method of claim 8 wherein the forming a first conductive layer includes:
forming a conductive layer on the semiconductor device, and
etching the conductive layer.
10. The method of claim 8 wherein the first conductive layer reduces generation of electron-hole pairs in a source/drain-to-substrate junction of the semiconductor device during the etching.
11. The method of claim 8 wherein the forming a first conductive layer includes:
forming the first conductive layer to a depth in the substrate ranging from about 50 Å to about 200 Å.
12. The method of claim 8 wherein the forming a first conductive layer includes:
forming the first conductive layer to a width ranging from about 250 Å to about 1000 Å.
13. The method of claim 8 wherein the forming a structure comprises:
forming a first dielectric layer on the substrate,
forming a charge storage layer on the first dielectric layer, the charge storage layer comprising silicon nitride,
forming a second dielectric layer on the charge storage layer, and
forming a conductive layer on the second dielectric layer.
14. A method comprising:
forming a structure on a substrate, the structure including a first dielectric layer on the substrate, a charge storage layer on the first dielectric layer, a second dielectric layer on the charge storage layer, and a conductive layer on the second dielectric layer;
forming a source region;
forming a drain region; and
forming a conductive layer to the substrate, the conductive layer being formed away from the source region and the drain region.
15. The method of claim 14 wherein the forming a conductive layer includes:
forming a first conductive layer on the semiconductor device, and
etching the first conductive layer to form the conductive layer.
16. The method of claim 14 wherein the conductive layer reduces generation of electron-hole pairs in a source/drain-to-substrate junction of the semiconductor device during the etching.
17. The method of claim 14 wherein the forming a conductive layer includes:
forming the conductive layer to a depth in the substrate ranging from about 50 Å to about 200 Å.
18. The method of claim 14 wherein the forming a conductive layer includes:
forming the conductive layer to a width ranging from about 250 Å to about 1000 Å.