Multichip module package and fabrication method
View Patent ↗A method for fabricating a multichip module package includes providing a first heat sink positioned for releasing heat from the package and providing a second heat sink positioned proximate the first heat sink. The heat sinks are thermally coupled and electrically isolated to and from one another. A first semiconductor device is attached to the first heat sink in thermal and electrical communication therewith and electrically insulated from the second heat sink. A second semiconductor device is attached to the second heat sink in thermal and electrical communication therewith and electrically insulated from the first heat sink.
1. A method for fabricating a multichip module package, comprising:
providing a first heat sink positioned for releasing heat from the package;
providing a second heat sink positioned proximate the first heat sink and bonded thereto;
thermally coupling and electrically isolating the heat sinks to and from one another;
attaching a first semiconductor device to the first heat sink in thermal and electrical communication therewith and electrically insulated from the second heat sink; and
attaching a second semiconductor device to the second heat sink in thermal and electrical communication therewith and electrically insulated from the first heat sink.
2. The method of claim 1 further comprising:
attaching a substrate to the second heat sink on the side thereof opposite the first heat sink;
providing electrical circuitry on the substrate on the side thereof opposite the second heat sink; and
electrically connecting the semiconductor devices to the electrical circuitry.
3. The method of claim 1 further comprising connecting the semiconductor devices to their respective heat sinks by an electrically conductive epoxy.
4. The method of claim 1 wherein providing a first heat sink and providing a second heat sink further comprise providing heat sinks that are planar in two substantially parallel planes.
5. The method of claim 1 further comprising configuring the package for applying different electrical potentials respectively to the first heat sink and to the second heat sink.
6. A method for fabricating a multichip module package, comprising:
providing a first heat sink positioned for releasing heat from the package;
providing a second heat sink positioned beneath the first heat and adhesively bonded thereto:
thermally coupling and electrically isolating the heat sinks to and from one another;
attaching a substrate to the second heat sink on the side thereof opposite the first heat sink;
attaching a first semiconductor device to the first heat sink through and in thermal and electrical communication therewith and electrically insulated from the second heat sink;
attaching a second semiconductor device to the second heat sink in thermal and electrical communication therewith and electrically insulated from the first heat sink; and
environmentally encapsulating the first and second semiconductor devices.
7. The method of claim 6 further comprising providing electrical circuitry on the substrate opposite the second heat sink and electrically connecting the semiconductor devices thereto.
8. The method of claim 6 further comprising connecting the semiconductor devices to their respective heat sinks by an electrically conductive epoxy
9. The method of claim 6 wherein providing a first heat sink and providing a second heat sink further comprise providing heat sinks that are planar in two substantially parallel planes.
10. The method of claim 6 further comprising configuring the package for applying different electrical potentials respectively to the first heat sink and to the second heat sink.