IP Library Granted Patent US 7,279,786
Granted Patent B2
US 7,279,786 · App. 11/257,894 · Granted Oct 9, 2007

Nested integrated circuit package on package system

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Quick Facts
Patent No.
US 7,279,786
App. No.
11/257,894
Granted
Oct 9, 2007
Kind
B2
Abstract

A package on package system is provided including providing a first substrate having a first integrated circuit thereon and a second substrate having a second integrated circuit thereon, the second substrate having a recess provided therein. The first and second substrates are mounted having the first integrated circuit at least partially nested in the recess.

Claims (48)

1. A package on package system comprising:

providing a first substrate having a first integrated circuit thereon;

forming a top surface portion substrate;

forming a bottom surface portion substrate having a through-opening;

bonding the top surface portion substrate and the bottom surface portion substrate to form a second substrate with the through-opening provided in the bottom surface portion substrate cooperating with the top surface portion substrate to form a recess in the second substrate, the second substrate having a second integrated circuit thereon; and

mounting the first and second substrates with the first integrated circuit at least partially nested in the recess.

2. The system as claimed in claim 1 further comprising:

molding encapsulant around the first integrated circuit; and

positioning the encapsulant in the recess.

3. The system as claimed in claim 1 further comprising forming electrical connections between the first and second substrates.

4. The system as claimed in claim 1 further comprising forming electrical connects on the first substrate under the first integrated circuit.

5. The system as claimed in claim 1 further comprising:

encapsulating the second integrated circuit.

6. A package on package system comprising:

providing a first substrate;

mounting a first set of integrated circuits on the first substrate;

forming a top surface portion substrate;

forming a bottom surface portion substrate having a through-opening;

bonding the top surface portion substrate and the bottom surface portion substrate to form a second substrate with the through-opening provided in the bottom surface portion substrate cooperating with the top surface portion substrate to form a recess in the second substrate;

mounting a second set of integrated circuits on the second substrate; and

mounting the first and second substrates with the encapsulated first set of integrated circuits at least partially nested in the recess.

7. The system as claimed in claim 6 further comprising bonding the encapsulated first set of integrated circuits to the second substrate.

8. The system as claimed in claim 1 further comprising forming ball grid array connections between the first and second substrates.

9. The system as claimed in claim 6 further comprising forming ball grid array connections on the first substrate under the first set of integrated circuits.

10. The system as claimed in claim 6 further comprising:

encapsulating the second set of integrated circuits.

11. A package on package system comprising:

a first substrate;

a first integrated circuit on the first substrate;

a top surface portion substrate;

a bottom surface portion substrate having a through opening, the top surface portion substrate bonded to the bottom surface portion substrate to form a second substrate with the through-opening provided in the bottom surface portion substrate cooperating with the top surface portion substrate to form a recess in the second substrate, the first and second substrates having the first integrated circuit at least partially nested in the recess; and

a second integrated circuit on the second substrate.

12. The system as claimed in claim 11 further comprising encapsulant around the first integrated circuit and in the recess.

13. The system as claimed in claim 11 further comprising electrical connections between the first and second substrates.

14. The system as claimed in claim 11 further comprising electrical connections on the first substrate under the first integrated circuit.

15. The system as claimed in claim 11 further comprising:

an encapsulant around the second integrated circuit.

16. A package on package system comprising:

a first substrate;

an encapsulated first set of integrated circuits on the first substrate;

a top surface portion substrate;

a bottom surface portion substrate having a through-opening with the top surface portion substrate bonded to the bottom surface portion substrate to form a second substrate with the through-opening provided in the bottom surface portion substrate cooperating with the top surface portion substrate to form a recess in the second substrate, the first and second substrates bonded to have the encapsulated first set of integrated circuits at least partially nested in the recess; and

a second set of integrated circuits on the second substrate.

17. The system as claimed in claim 16 further comprising the encapsulated first set of integrated circuits bonded to the second substrate.

18. The system as claimed in claim 16 further comprising ball grid array connections between the first and second substrates.

19. The system as claimed in claim 16 further comprising ball grid array connections on the first substrate under the first set of integrated circuits.

20. The system as claimed in claim 16 further comprising:

an encapsulant around the second set of integrated circuits.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052938/0305 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0343 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF UNDIVIDED HALF INTEREST Recorded May 11, 2006
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC LTD.; STATS CHIPPAC, INC.
Reel/Frame 017604/0872 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2005
From: KIM, HYUN UK
To: STATS CHIPPAC LTD.
Reel/Frame 016929/0434 →