IP Library Granted Patent US 8,124,455
Granted Patent B2
US 8,124,455 · App. 11/306,098 · Granted Feb 28, 2012

Wafer strength reinforcement system for ultra thin wafer thinning

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Quick Facts
Patent No.
US 8,124,455
App. No.
11/306,098
Granted
Feb 28, 2012
Kind
B2
Abstract

A wafer strength reinforcement system is provided including providing a wafer, providing a tape for supporting the wafer, and positioning a wafer edge support material for location between the tape and the wafer.

Claims (54)

1. A method for fabricating a wafer strength reinforcement system comprising:

providing a wafer having a rounded edge;

providing a tape, having a planar surface extending beyond the rounded edge of the wafer, for supporting the wafer; and

positioning a wafer edge support material between the planar surface of the tape and the rounded edge of the wafer through capillary action for supporting the rounded edge of the wafer.

2. The method as claimed in claim 1 wherein positioning the wafer edge support material further comprises:

mounting the tape on an active surface of the wafer; and

inserting the wafer edge support material at least between an edge of the wafer and the tape.

3. The method as claimed in claim 1 wherein positioning the wafer edge support material includes conforming the wafer edge support material to a narrow region between the rounded edge of the wafer and the planar surface of the tape.

4. The method as claimed in claim 1 wherein positioning the wafer edge support material further comprises:

positioning the wafer edge support material on the tape; and

mounting the tape having the wafer edge support material on an active surface of the wafer with the wafer edge support material at least between the edge of the wafer and the tape.

5. The method as claimed in claim 1 wherein positioning the wafer edge support material further comprises hardening the wafer edge support material at least between the edge of the wafer and the tape.

6. The method as claimed in claim 1 wherein positioning the wafer edge support material includes positioning the wafer edge support material in a liquid state.

7. The method as claimed in claim 1 further comprising:

backgrinding the wafer with the wafer edge support material hardened at least between the edge of the wafer and the tape.

8. The method as claimed in claim 1 further comprising:

backgrinding the wafer and the wafer edge support material hardened at least between the edge of the wafer and the tape; and

mounting a dicing tape over the wafer, the wafer edge support material, and the tape.

9. The method as claimed in claim 1 further comprising:

backgrinding the wafer with the wafer edge support material hardened at least between the edge of the wafer and the tape;

mounting a dicing tape over the wafer, the wafer edge support material, and the tape; and

removing at least the tape from the wafer mounted on the dicing tape.

10. The method as claimed in claim 1 further comprising:

backgrinding the wafer with the wafer edge support material hardened at least between the edge of the wafer and the tape;

mounting a dicing tape over the wafer, the wafer edge support material, and the tape;

removing the tape from the wafer mounted on the dicing tape; and

dicing the wafer and the wafer edge support material.

11. A method for fabricating a wafer strength reinforcement system comprising:

providing a semiconductor wafer having a rounded edge;

providing a backgrinding tape, having a planar surface extending beyond the rounded edge of the wafer, for supporting the semiconductor wafer; and

applying a paste between the planar surface of the backgrinding tape and the rounded edge of the semiconductor wafer through capillary action for supporting the rounded edge of the wafer.

12. The method as claimed in claim 11 wherein applying the paste further comprises:

mounting the backgrinding tape on an active surface of the semiconductor wafer; and

dispensing the paste at least between an edge of the semiconductor wafer and the backgrinding tape.

13. The method as claimed in claim 11 wherein applying the paste includes conforming the paste to a narrow region between the rounded edge of the wafer and the planar surface of the backgrinding tape.

14. The method as claimed in claim 11 wherein applying the paste further comprises:

applying the paste on the backgrinding tape; and

mounting the backgrinding tape having the paste on an active surface of the semiconductor wafer with the paste at least between the edge of the semiconductor wafer and the backgrinding tape.

15. The method as claimed in claim 11 wherein applying the paste further comprises hardening the paste at least between the edge of the semiconductor wafer and the backgrinding tape.

16. The method as claimed in claim 11 wherein applying the paste includes applying the paste in a liquid state.

17. The method as claimed in claim 11 further comprising:

backgrinding the semiconductor wafer with the paste hardened at least between the edge of the semiconductor wafer and the backgrinding tape.

18. The method as claimed in claim 11 further comprising:

backgrinding the semiconductor wafer and the paste hardened at least between the edge of the semiconductor wafer and the backgrinding tape; and

mounting a dicing tape over the semiconductor wafer, the paste, and the backgrinding tape.

19. The method as claimed in claim 11 further comprising:

backgrinding the semiconductor wafer with the paste hardened at least between the edge of the semiconductor wafer and the backgrinding tape;

mounting a dicing tape over the semiconductor wafer, the paste, and the backgrinding tape; and

removing at least the backgrinding tape from the semiconductor wafer mounted on the dicing tape.

20. The method as claimed in claim 11 further comprising:

backgrinding the semiconductor wafer with the paste hardened at least between the edge of the semiconductor wafer and the backgrinding tape;

mounting a dicing tape over the semiconductor wafer, the paste, and the backgrinding tape;

removing the backgrinding tape from the semiconductor wafer mounted on the dicing tape; and

dicing the semiconductor wafer and the paste.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0474 ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 8, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064842/0046 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38378 FRAME: 0280) Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0474 →
RELEASE OF SECURITY INTEREST Recorded Jun 9, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052879/0852 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0280 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2005
From: KUAN, HEAP HOE; DO, BYUNG TAI
To: STATS CHIPPAC LTD.
Reel/Frame 016903/0783 →