Method of mounting an integrated circuit package in an encapsulant cavity

1. An encapsulant cavity integrated circuit package system comprising:

forming an inverted first integrated circuit package with a bottom terminal exposed in an encapsulant cavity and an interposer with a first die attached thereto, wherein forming the first integrated circuit package comprises:

mounting a second integrated circuit package on the interposer in the encapsulant cavity;

forming a third integrated circuit package on a substrate; and

mounting the first integrated circuit package on the third integrated circuit package; and

attaching a component on the interposer in the encapsulant cavity.

2. The system as claimed in claim 1 wherein forming the first integrated circuit package comprises:

mounting a second integrated circuit package on the interposer in the encapsulant cavity;

mounting the third integrated circuit package on a substrate;

attaching a spacer on the third integrated circuit package; and

mounting the first integrated circuit package on the spacer.

3. The system as claimed in claim 1 wherein attaching the component comprises attaching system device packages having surface-mount package technology.

4. The system as claimed in claim 1 wherein attaching the component comprises attaching system devices having chip-scale package technology.

5. An encapsulant cavity integrated circuit package system comprising:

an inverted first integrated circuit package with a bottom terminal exposed in an encapsulant cavity and an interposer with a first die attached thereto, wherein the first integrated circuit package comprises:

a second integrated circuit package on the interposer in the encapsulant cavity,

a third integrated circuit package on a substrate, and

the first integrated circuit package on the third integrated circuit package; and

a component on the interposer in the encapsulant cavity.

6. The system as claimed in claim 5 wherein the first integrated circuit package comprises:

a second integrated circuit package on the interposer in the encapsulant cavity;

the third integrated circuit package on a substrate;

a spacer on the third integrated circuit package; and

the first integrated circuit package on the spacer.

7. The system as claimed in claim 5 wherein the component comprises system device packages having surface-mount package technology.

8. The system as claimed in claim 5 wherein the component comprises system devices having chip-scale package technology.

9. The system as claimed in claim 5 wherein the first integrated circuit package is on a first surface of an interposer, and wherein the component is on the second surface of the interposer in the encapsulant cavity; and

further comprising:

a first encapsulant over the first integrated circuit forming a first integrated circuit package;

the first integrated circuit package with an inverted bottom terminal over a substrate; and

a second encapsulant over the first integrated circuit package with the inverted bottom terminal and the substrate forming an encapsulant cavity having a second surface of the interposer substantially exposed.

10. The system as claimed in claim 9 wherein the component comprises passive devices on the second surface of the interposer in the encapsulant cavity.

11. The system as claimed in claim 9 wherein the component comprises a leaded package on the second surface of the interposer in the encapsulant cavity.

12. The system as claimed in claim 9 wherein the component comprises a leadless package on the second surface of the interposer in the encapsulant cavity.

13. The system as claimed in claim 9 wherein the component comprises:

an optical sensor device on the second surface of the interposer in the encapsulant cavity; and

an optical lid over the optical sensor and the encapsulant cavity.