Integrated circuit package system with thin profile

1. An integrated circuit package system comprising:

an external interconnect;

a backside element isolated from the external interconnect and coplanar to a first side of the external interconnect, the backside element has a different material than the external interconnect;

an integrated circuit die over the backside element with a first passive side of the integrated circuit die facing backside element;

a first internal interconnect between a first active side of the integrated circuit die and the external interconnect; and

a first encapsulation over the integrated circuit die and surrounding the backside element, with a portion of the backside element and the first side exposed.

2. The system as claimed in claim 1 wherein the backside element includes a plastic, a polymer, or an epoxy molding compound.

3. The system as claimed in claim 1 further comprising a ring between the external interconnect and integrated circuit die, wherein the integrated circuit die and the ring connected with the first internal interconnect.

4. The system as claimed in claim 1 further comprising a peripheral side of the external interconnect exposed from the first encapsulation.

5. The system as claimed in claim 1 wherein the integrated circuit die is not coplanar with the external interconnect.

6. The system as claimed in claim 5 further comprising:

a second side of the external interconnect opposite the first side; and

a third side of the external interconnect opposite the first side and not coplanar with the second side.

7. The system as claimed in claim 5 wherein:

the backside element is another integrated circuit die having a second passive side and a second active side with active circuitry thereon;

the external interconnect includes:

a second side above the first side, and

a third side at an opposing side of the external interconnect to first side and the second side,

the first internal interconnect is between the first active side and the second side;

the first encapsulation over the integrated circuit die with the backside element exposed has the second active side exposed;

further comprising:

a second internal interconnect between the second active side and the third side; and

a second encapsulation over the second active side.

8. The system as claimed in claim 5 further comprising a second encapsulation over the backside element wherein the second encapsulation is transparent.

9. The system as claimed in claim 5 wherein the backside element is a sensor integrated circuit die.

10. The system as claimed in claim 1 wherein:

the backside element is another integrated circuit die having a second active side with active circuitry thereon;

the first encapsulation exposes the second active side; and

further comprising:

a second encapsulation over the second active side.

11. A method for manufacturing an integrated circuit package system comprising:

attaching an external interconnect on a tape;

attaching a backside element on the tape and isolated from the external interconnect. the backside element coplanar with a first side of the external interconnect;

attaching an integrated circuit die with the backside element, the backside element is on a first passive side of the integrated circuit die;

connecting a first active side of the integrated circuit die and the external interconnect; and

forming a first encapsulation over the integrated circuit die and surrounding the backside element, with a portion of the backside element exposed;

Wherein the backside element has a different material than the external interconnect.

12. The method as claimed in claim 1 wherein attaching the backside element on the tape includes attaching the integrated circuit die having the backside element on the first passive side to the tape.

13. The method as claimed in claim 1 wherein:

attaching the backside element includes:

providing another integrated circuit die having a second active side with active circuitry thereon;

forming the first encapsulation further includes:

exposing the second active side; and

further comprising:

forming a second encapsulation over the second active side.

14. The method as claimed in claim 1 further comprising:

forming a ring between the external interconnect and integrated circuit die; and

connecting the ring and the integrated circuit die.

15. The method as claimed in claim 1 wherein forming the first encapsulation includes exposing a peripheral side of the external interconnect.

16. A method of manufacturing an integrated circuit package system comprising:

attaching a lead frame having an external interconnect on a tape;

attaching a backside element on the tape and isolated from the external interconnect, the backside element coplanar with a first side of the external interconnect and not integral to the lead frame;

attaching an integrated circuit die with the backside element, the backside element is on a first passive side of the integrated circuit die;

connecting a first active side of the integrated circuit die and the external interconnect; and

forming a first encapsulation over the integrated circuit die and surrounding the backside element, with the first encapsulation exposing the first side of the external interconnect and a portion of the backside element;

Wherein the backside element has a different material than the external interconnect.

17. The method as claimed in claim 16 further comprising half-etching the external interconnect from a side opposite the first side.

18. The method as claimed in claim 16 wherein:

attaching the backside element on the tape includes:

providing another integrated circuit die having a second passive side and a second active side with active circuitry thereon;

attaching the second active side on the tape;

connecting the first active side of the integrated circuit die and the external interconnect also includes:

connecting the first active side and a second side of the external interconnect, the second side is a half-etched portion from the first side;

forming the first encapsulation over the integrated circuit die with the backside element exposed further includes:

exposing the second active side with the first encapsulation;

further comprising:

connecting the second active side of the backside element and a third side of the external interconnect opposite the second side; and

forming a second encapsulation over the second active side.

19. The method as claimed in claim 16 further comprising removing the tape.

20. The method as claimed in claim 16 further comprising singulating the lead frame.