IP Library Granted Patent US 7,779,184
Granted Patent B2
US 7,779,184 · App. 11/771,744 · Granted Aug 17, 2010

Method of using the dual bus interface in an expresscard slot

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Quick Facts
Patent No.
US 7,779,184
App. No.
11/771,744
Granted
Aug 17, 2010
Kind
B2
Abstract

A peripheral device is disclosed having two associated memory modules, and which is configured to fit within the ExpressCard slot. One memory module communicates with a host over the PCIe bus interface of the ExpressCard slot, while the other memory module communicates with the host over the USB interface of the ExpressCard slot.

Claims (36)

1. A method of using first and second buses coupled to a single memory card slot associated with a host device, comprising the steps of:

(a) configuring a peripheral device to couple within a card slot having first and second buses;

(b) configuring the peripheral device to utilize the first bus to transfer signals between the host device and a first semiconductor memory associated with the peripheral device over a PCIe bus interface; and

(c) configuring the peripheral device to utilize the second bus to transfer signals between the host device and a second semiconductor memory associated with the peripheral device over a USB interface.

2. A method as recited in claim 1 , wherein said step (b) of configuring the peripheral device to utilize the first bus to transfer signals between the host device and a first semiconductor memory associated with the peripheral device comprises the step of configuring the peripheral device with a first semiconductor memory integrated into the peripheral device.

3. A method as recited in claim 2 , wherein said step (b) of configuring the peripheral device to utilize the first bus to transfer signals between the host device and a first semiconductor memory associated with the peripheral device comprises the step of electrically coupling the first semiconductor device to electrical leads dedicated to the first bus.

4. A method as recited in claim 2 , wherein said step (c) of configuring the peripheral device to utilize the second bus to transfer signals between the host device and a second semiconductor memory associated with the device comprises the step of configuring the peripheral device to operate with a second semiconductor memory affixed to the peripheral device by a memory card reader.

5. A method as recited in claim 4 , wherein said step (c) of configuring the peripheral device to utilize the second bus to transfer signals between the host device and a second semiconductor memory associated with the peripheral device comprises the step of electrically coupling the second semiconductor device to electrical leads dedicated to the second bus.

6. A method as recited in claim 1 , wherein said step (b) of configuring the peripheral device to utilize the first bus to transfer signals between the host device and a first semiconductor memory associated with the peripheral device comprises the step of including a first portable semiconductor memory removably inserted into the memory card slot.

7. A method as recited in claim 6 , wherein said step (c) of configuring the peripheral device to utilize the second bus to transfer signals between the host device and a second semiconductor memory associated with the device comprises the step of including a second portable semiconductor memory removably inserted into the memory card slot.

8. A method as recited in claim 7 , wherein said step of configuring the peripheral device to utilize a second portable semiconductor memory removably inserted into the memory card slot comprises the step of configuring a connector of the second portable semiconductor memory to affix to a connector of the first portable semiconductor memory.

9. A method of using first and second buses coupled to a single memory card slot associated with a host device, comprising the steps of:

(a) configuring a peripheral device to couple within a card slot having first and second buses;

(b) configuring the peripheral device to utilize the first bus to transfer signals between the host device and a first semiconductor memory associated with the peripheral device; and

(c) configuring the peripheral device to utilize the second bus to transfer signals between the host device and a second semiconductor memory associated with the peripheral device; and

(d) disabling an ejector mechanism within the card slot, said step (d) including the step of configuring the peripheral device to be devoid of structure which is engagable by the ejector mechanism.

10. A method of using the PCIe bus interface and USB interface within a slot associated with a host device, the slot configured according to the ExpressCard standard, comprising the steps of:

(a) configuring a peripheral device to couple within the slot;

(b) utilizing the PCIe bus interface to transfer signals between the host device and a first semiconductor memory associated with the peripheral device; and

(c) utilizing the USB interface to transfer signals between the host device and a second semiconductor memory associated with the peripheral device, the second semiconductor memory in the peripheral device together with the first semiconductor memory.

11. A method as recited in claim 10 , wherein said step (b) of utilizing the PCIe bus interface to transfer signals between the host device and a first semiconductor memory associated with the peripheral device comprises the step of utilizing a first semiconductor memory integrated into the peripheral device.

12. A method as recited in claim 11 , wherein said step (b) of utilizing the PCIe bus interface to transfer signals between the host device and a first semiconductor memory associated with the peripheral device comprises the step of electrically coupling the first semiconductor device to electrical leads dedicated to the PCIe bus interface.

13. A method as recited in claim 11 , wherein said step (c) of utilizing the USB interface to transfer signals between the host device and a second semiconductor memory associated with the device comprises the step of utilizing a second semiconductor memory affixed to the peripheral device by a memory card reader.

14. A method as recited in claim 13 , wherein said step (c) of utilizing the USB interface to transfer signals between the host device and a second semiconductor memory associated with the peripheral device comprises the step of electrically coupling the second semiconductor device to electrical leads dedicated to the USB interface.

15. A method as recited in claim 10 , wherein said step (b) of utilizing the PCIe bus interface to transfer signals between the host device and a first semiconductor memory associated with the peripheral device comprises the step of utilizing a first portable semiconductor memory removably inserted into the slot.

16. A method as recited in claim 15 , wherein said step (c) of utilizing the USB interface to transfer signals between the host device and a second semiconductor memory associated with the device comprises the step of utilizing a second portable semiconductor memory removably inserted into the slot.

17. A method as recited in claim 16 wherein said step of utilizing a second portable semiconductor memory removably inserted into the memory card slot comprises the step of affixing a connector of the second portable semiconductor memory to a connector of the first portable semiconductor memory.

18. A method of using at least one of the PCIe bus interface and a USB interface within a slot associated with a host device, comprising the steps of:

(a) configuring a peripheral device to couple within the slot;

(b) utilizing the PCIe bus interface to transfer signals between the host device and a first semiconductor memory associated with the peripheral device, and utilizing the USB interface to transfer signals between the host device and a second semiconductor memory associated with the peripheral device; and

(c) utilizing the PCIe bus interface to transfer signals between the host device and the second semiconductor memory associated with the peripheral device when the first semiconductor memory is absent from the slot.

19. A method as recited in claim 18 , further comprising the step of determining whether the first semiconductor memory is within or absent from the slot.

20. A method as recited in claim 18 , wherein said steps (b) and (c) of utilizing one of the PCIe bus and the USB interface to transfer signals between the host device and a second semiconductor memory associated with the device comprises the step of utilizing a second semiconductor memory affixed to the peripheral device by a memory card reader.

21. A method as recited in claim 18 , wherein said step (b) of utilizing the PCIe bus interface to transfer signals between the host device and a first semiconductor memory associated with the peripheral device comprises the step of utilizing a first portable semiconductor memory removably inserted into the slot.

22. A method as recited in claim 18 , wherein said step (b) of utilizing the USB interface to transfer signals between the host device and a second semiconductor memory associated with the device comprises the step of utilizing a second portable semiconductor memory removably inserted into the slot.

23. A method as recited in claim 22 , wherein said step of utilizing a second portable semiconductor memory removably inserted into the memory card slot comprises the step of affixing a connector of the second portable semiconductor memory to a connector of the first portable semiconductor memory.

Assignments (6)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038809/0600 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2011
From: SANDISK CORPORATION
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 026262/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2007
From: HUBERT, JONATHAN; HANLON, JASON P.
To: SANDISK CORPORATION
Reel/Frame 019696/0216 →