IP Library Granted Patent US 7,701,040
Granted Patent B2
US 7,701,040 · App. 11/860,377 · Granted Apr 20, 2010

Semiconductor package and method of reducing electromagnetic interference between devices

Assignee: STATS ChipPAC, Ltd.
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Quick Facts
Patent No.
US 7,701,040
App. No.
11/860,377
Granted
Apr 20, 2010
Kind
B2
Abstract

A wafer level semiconductor package has a substrate and an RF module and baseband module coupled to the substrate with solder bumps. An underfill material is disposed under the RF module and baseband module. A first shielding layer is applied to a first surface of the substrate. A seed layer is deposited on the substrate and RF module and baseband module. A second shielding layer is plated over the seed layer, except over the contact pads on the substrate. The second shielding layer can be made from copper, gold, nickel, or aluminum. The first and second shielding layers substantially cover the wafer level semiconductor package to isolate the baseband module from electromagnetic interference generated by the RF module. The first and second shielding layers are grounded through the substrate.

Claims (41)

1. A wafer level semiconductor package, comprising:

a substrate;

a first shielding layer applied to a first surface of the substrate;

an RF module mounted to a first area on a second surface of the substrate opposite the first surface with a plurality of solder bumps;

a baseband module mounted to a second area on the second surface of the substrate with a plurality of solder bumps; and

a second shielding layer covering the second surface of the substrate and RF module and baseband module, wherein the first and second shielding layers substantially cover the wafer level semiconductor package to isolate the baseband module from electromagnetic interference generated by the RF module.

2. The wafer level semiconductor package of claim 1 , wherein the first and second shielding layers are made with a material selected from the group consisting of copper, gold, nickel, aluminum, conductive resin, and conductive epoxy.

3. The wafer level semiconductor package of claim 1 , wherein the first and second shielding layers are deposited by electrolytic plating or electroless plating.

4. The wafer level semiconductor package of claim 1 , further including an underfill material disposed under the RF module and baseband module.

5. The wafer level semiconductor package of claim 1 , further including a seed layer deposited on the substrate prior to the second shielding layer.

6. The wafer level semiconductor package of claim 1 , wherein the first and second shielding layers are electrically connected and grounded through the substrate.

7. The wafer level semiconductor package of claim 1 , further including contact pads formed on the substrate which are devoid of the second shielding layer.

8. A semiconductor package, comprising:

a substrate;

a first electronic module mounted on a first surface of the substrate;

a second electronic module mounted on the first surface of the substrate;

a first shielding layer covering the first surface of the substrate and first and second electronic modules; and

a second shielding layer applied to a second surface of the substrate which is opposite the first surface, wherein the first and second shielding layers substantially cover the semiconductor package to isolate the second electronic module from electromagnetic interference generated by the first electronic module.

9. The semiconductor package of claim 8 , wherein the first shielding layer is made with a material selected from the group consisting of copper, gold, nickel, aluminum, conductive resin, and conductive epoxy.

10. The semiconductor package of claim 8 , wherein the first shielding layer is deposited by plating.

11. The semiconductor package of claim 8 , wherein the first electronic module is an RF module and the second electronic module is a baseband module.

12. The semiconductor package of claim 8 , further including a seed layer deposited on the substrate prior to the first shielding layer.

13. The wafer level semiconductor package of claim 8 , wherein the first shielding layer is grounded through the substrate.

14. The wafer level semiconductor package of claim 8 , further including contact pads formed on the substrate which are devoid of the first shielding layer.

15. A semiconductor package, comprising:

a substrate;

a first electronic module mounted on a first surface of the substrate;

a second electronic module mounted on the first surface of the substrate;

a shielding layer substantially covering the substrate and first and second electronic modules; and

a second shielding layer applied to a second surface of the substrate which is opposite the first surface, wherein the first shielding layer is deposited by plating.

16. The semiconductor package of claim 15 , wherein the first shielding layer is made with a material selected from the group consisting of copper, gold, nickel, and aluminum.

17. The semiconductor package of claim 15 , wherein the first electronic module is an RF module and the second electronic module is a baseband module.

18. A method of making a semiconductor package, comprising:

forming a substrate;

mounting an RF module on a first surface of the substrate;

mounting a baseband module on the first surface of the substrate;

forming a first shielding layer covering the first surface of the substrate and RF module and baseband module to isolate the baseband module from electromagnetic interference generated by the RF module; and

forming a second shielding layer applied to a second surface of the substrate which is opposite the first surface, wherein the first and second shielding layers substantially cover the semiconductor package.

19. The method of claim 18 , wherein the first shielding layer is made with a material selected from the group consisting of copper, gold, nickel, aluminum, conductive resin, and conductive epoxy.

20. The method of claim 18 , wherein the first shielding layer is deposited by plating.

21. The method of claim 18 , further including disposing an underfill material under the RF module and baseband module.

Assignments (6)
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328 Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064838/0948 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0328 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2007
From: HUANG, RUI; LIN, YAOJIAN; CHOW, SENG GUAN
To: STATS CHIPPAC, LTD.
Reel/Frame 019869/0325 →
Continuity (1)
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