IP Library Granted Patent US 8,507,319
Granted Patent B2
US 8,507,319 · App. 11/952,968 · Granted Aug 13, 2013

Integrated circuit package system with shield

Inventors: Seng Guan Chow (Singapore, SG); Byung Tai Do (Singapore, SG); Heap Hoe Kuan (Singapore, SG); Rui Huang (Singapore, SG)
Assignee: Stats Chippac Ltd.
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Quick Facts
Patent No.
US 8,507,319
App. No.
11/952,968
Granted
Aug 13, 2013
Kind
B2
Abstract

An integrated circuit package system includes: forming a first lead and a second lead; connecting an integrated circuit die with the first lead; forming an encapsulation over the integrated circuit die, the first lead, and the second lead with a portion of a top side of the second lead exposed; and forming a shield over the encapsulation, the first lead, and the second lead with the shield not in contact with the first lead.

Claims (64)

1. A method of manufacturing an integrated circuit package system comprising:

forming a first lead;

forming a second lead, the second lead having an outer end and a top portion, the top portion adjacent to the first lead;

connecting an integrated circuit die to the first lead;

forming an encapsulation on the integrated circuit die, the first lead, and the second lead, the encapsulation having a planar sidewall; and

forming a shield over the top surface of the encapsulation, the shield isolated from the first lead by the encapsulation, the shield being directly formed on the top portion of the second lead, and wherein the shield includes an outer edge facing away from the integrated circuit die, the outer edge of the shield being coplanar with the outer end of the second lead and the planar sidewall of the encapsulation.

2. The method as claimed in claim 1 wherein:

forming the first lead includes:

forming a stepped down portion of the first lead; and

forming the shield includes:

forming the shield over the stepped down portion with the encapsulation in between.

3. The method as claimed in claim 1 wherein forming the shield over the second lead includes forming the shield on the second lead.

4. The method as claimed in claim 1 further comprising:

forming a corner lead; and

wherein forming the shield includes:

forming the shield over the corner lead.

5. The method as claimed in claim 1 further comprising connecting the shield to a reference level.

6. A method of manufacturing an integrated circuit package system comprising:

forming a first lead;

forming a second lead, the second lead having an outer end and a top portion, the top portion adjacent to the first lead;

connecting an integrated circuit die to the first lead;

forming an encapsulation on the integrated circuit die, the first lead, and the second lead, the encapsulation having a planar sidewall;

forming a shield over top surface of the encapsulation, the shield isolated from the first lead by the encapsulation, the shield being directly formed on the top portion of the second lead, and wherein the shield includes an outer edge facing away from the integrated circuit die, the outer edge of the shield being coplanar with the outer end of the second lead and the planar sidewall of the encapsulation; and

connecting the shield to a reference level coupled with the second lead.

7. The method as claimed in claim 6 wherein forming the shield includes forming the shield conformal to a top surface of the encapsulation.

8. The method as claimed in claim 6 further comprising:

forming a corner lead; and

wherein forming the shield includes:

forming the shield on the corner lead coupled to a ground reference.

9. The method as claimed in claim 6 wherein connecting the shield to the reference level coupled with the second lead includes connecting the shield on the second lead coupled to a ground reference.

10. The method as claimed in claim 6 wherein:

forming the first lead includes:

forming a die-attach pad having a corner lead extended therefrom;

forming the shield includes:

forming the shield on the corner lead; and

connecting the integrated circuit die includes:

connecting the integrated circuit die and the second lead.

11. An integrated circuit package system comprising:

a first lead;

a second lead, the second lead having an outer end and a top portion, the top portion adjacent to the first lead;

an integrated circuit die connected to the first lead;

an encapsulation on the integrated circuit die, the first lead, and the second lead, the encapsulation having a planar sidewall; and

a shield over the top surface of the encapsulation, the shield isolated from the first lead by the encapsulation, the shield being directly formed on the top portion of the second lead, and wherein the shield includes an outer edge facing away from the integrated circuit die, the outer edge of the shield being coplanar with the outer end of the second lead and the planar sidewall of the encapsulation.

12. The system as claimed in claim 11 wherein:

the first lead includes a stepped down portion of the first lead; and

the shield includes the shield over the stepped down portion with the encapsulation in between.

13. The system as claimed in claim 11 wherein the shield is on the second lead.

14. The system as claimed in claim 11 further comprising:

a corner lead; and

wherein the shield includes:

the shield over the corner lead.

15. The system as claimed in claim 11 further comprising the shield connected to a reference level.

16. The system as claimed in claim 11 wherein the shield connected with the second lead coupled to a reference level.

17. The system as claimed in claim 16 wherein the shield is conformal to a top surface of the encapsulation.

18. The system as claimed in claim 16 further comprising:

a corner lead; and

wherein the shield includes:

the shield on the corner lead coupled to a ground reference.

19. The system as claimed in claim 16 wherein the shield is on the second lead coupled to a ground reference.

20. The system as claimed in claim 16 further comprising:

a die-attach pad having a corner lead extended therefrom adjacent the first lead or the second lead; and

wherein:

the shield is on the corner lead; and

the integrated circuit die is connected with the second lead.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0235. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0741 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0235 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2007
From: CHOW, SENG GUAN; DO, BYUNG TAI; KUAN, HEAP HOE; HUANG, RUI
To: STATS CHIPPAC LTD.
Reel/Frame 020215/0604 →
Continuity (1)
Related Publication 20090146269A1 · Jun 11, 2009